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Vol. 3D INDEX-7

INDEX

exceptions during initialization

9-12

feature-enable register

2-7

gates

2-4

global and local descriptor tables

2-4

IA32_EFER MSR

2-7

5-30

initialization process

9-11

interrupt stack table

6-19

interrupts and exceptions

2-5

IRET instruction

6-18

L flag

3-12

5-4

logical address

3-7

MOV CRn

9-11

MTRR calculations

11-27

NXE bit

5-30

page level protection

5-30

paging

2-6

PDE tables

5-31

PDP tables

5-31

PML4 tables

5-31

PTE tables

5-31

registers and data structures

2-1

segment descriptor tables

3-16

5-3

segment descriptors

3-9

segment loading instructions

3-9

segmentation

3-5

stack switching

5-19

6-18

SYSCALL and SYSRET

5-22

SYSENTER and SYSEXIT

5-21

system descriptors

3-14

system registers

2-7

task switching

7-16

task-state segments

2-5

terminating mode operation

9-12

See also: 64-bit mode, compatibility mode

IA32_APERF MSR

14-2

IA32_APIC_BASE MSR

8-18

8-19

10-6

10-8

35-278

IA32_BIOS_SIGN_ID MSR

35-281

IA32_BIOS_UPDT_TRIG MSR

32-9

35-281

IA32_BISO_SIGN_ID MSR

32-9

IA32_CLOCK_MODULATION MSR

8-31

14-7

14-10

14-11

14-14

14-15

14-16

14-17

14-23

14-24

14-26

14-34

14-35

14-36

14-37

14-38

35-48

35-61

35-70

35-111

35-147

35-268

35-285

35-308

35-316

IA32_CTL MSR

35-282

IA32_DEBUGCTL MSR

27-26

35-289

IA32_DS_AREA MSR

17-17

17-18

17-22

18-82

18-98

35-299

IA32_EFER MSR

2-7

2-8

5-30

27-26

31-16

IA32_FEATURE_CONTROL MSR

23-3

IA32_KernelGSbase MSR

2-7

IA32_LSTAR MSR

2-7

5-22

IA32_MCG_CAP MSR

15-2

15-27

35-282

IA32_MCG_CTL MSR

15-2

15-4

IA32_MCG_EAX MSR

15-11

IA32_MCG_EBP MSR

15-11

IA32_MCG_EBX MSR

15-11

IA32_MCG_ECX MSR

15-11

IA32_MCG_EDI MSR

15-11

IA32_MCG_EDX MSR

15-11

IA32_MCG_EFLAGS MSR

15-11

IA32_MCG_EIP MSR

15-11

IA32_MCG_ESI MSR

15-11

IA32_MCG_ESP MSR

15-11

IA32_MCG_MISC MSR

15-11

15-12

35-283

IA32_MCG_R10 MSR

15-12

35-284

IA32_MCG_R11 MSR

15-12

35-284

IA32_MCG_R12 MSR

15-12

IA32_MCG_R13 MSR

15-12

IA32_MCG_R14 MSR

15-12

IA32_MCG_R15 MSR

15-12

35-285

IA32_MCG_R8 MSR

15-12

IA32_MCG_R9 MSR

15-12

IA32_MCG_RAX MSR

15-11

35-282

IA32_MCG_RBP MSR

15-12

IA32_MCG_RBX MSR

15-11

35-282

IA32_MCG_RCX MSR

15-12

IA32_MCG_RDI MSR

15-12

IA32_MCG_RDX MSR

15-12

IA32_MCG_RESERVEDn

35-283

35-380

IA32_MCG_RESERVEDn MSR

15-11

IA32_MCG_RFLAGS MSR

15-12

35-283

35-380

IA32_MCG_RIP MSR

15-12

35-283

35-380

IA32_MCG_RSI MSR

15-12

IA32_MCG_RSP MSR

15-12

IA32_MCG_STATUS MSR

15-2

15-4

15-27

15-29

27-3

IA32_MCi_ADDR MSR

15-9

15-29

35-296

IA32_MCi_CTL

15-5

IA32_MCi_CTL MSR

15-5

35-296

IA32_MCi_MISC MSR

15-9

15-10

15-11

15-29

35-296

IA32_MCi_STATUS MSR

15-6

15-27

15-29

35-296

decoding for Family 06H

16-1

decoding for Family 0FH

16-1

16-3

16-7

16-10

16-13

16-15

IA32_MISC_ENABLE MSR

14-1

14-20

17-17

17-33

18-82

35-285

IA32_MPERF MSR

14-1

14-2

IA32_MTRRCAP MSR

11-21

11-22

35-281

IA32_MTRR_DEF_TYPE MSR

11-22

IA32_MTRR_FIXn, fixed ranger MTRRs

11-23

IA32_MTRR_PHYS BASEn MTRR

35-290

IA32_MTRR_PHYSBASEn MTRR

35-290

IA32_MTRR_PHYSMASKn MTRR

35-290

IA32_P5_MC_ADDR MSR

35-278

IA32_P5_MC_TYPE MSR

35-278

IA32_PAT_CR MSR

11-34

IA32_PEBS_ENABLE MSR

18-21

18-82

18-98

19-196

35-295

IA32_PERF_CTL MSR

14-1

IA32_PERF_STATUS MSR

14-1

IA32_PLATFORM_ID

35-43

35-57

35-107

35-143

35-265

35-278

35-304

35-313

35-320

IA32_STAR MSR

5-22

IA32_STAR_CS MSR

2-7

IA32_STATUS MSR

35-282

IA32_SYSCALL_FLAG_MASK MSR

2-7

IA32_SYSENTER_CS MSR

5-21

5-22

27-20

35-281

IA32_SYSENTER_EIP MSR

5-21

27-26

35-282

IA32_SYSENTER_ESP MSR

5-21

27-26

35-281

IA32_TERM_CONTROL MSR

35-48

35-61

35-70

35-111

35-147

IA32_THERM_INTERRUPT MSR

14-22

14-24

14-25

14-27

35-285

FORCPR# interrupt enable bit

14-27

high-temperature interrupt enable bit

14-27

14-30

low-temperature interrupt enable bit

14-27

14-30

overheat interrupt enable bit

14-27

14-30

THERMTRIP# interrupt enable bit

14-27

14-30

threshold #1 interrupt enable bit

14-27

14-30

threshold #1 value

14-27

14-30

threshold #2 interrupt enable

14-27

14-30

threshold #2 value

14-27

14-30

IA32_THERM_STATUS MSR

14-24

14-25

35-285

digital readout bits

14-26

14-29

out-of-spec status bit

14-25

14-29

out-of-spec status log

14-26

14-29

PROCHOT# or FORCEPR# event bit

14-25

14-29

PROCHOT# or FORCEPR# log

14-25

14-29

resolution in degrees

14-26

thermal status bit

14-25

14-28

thermal status log

14-25

14-29

thermal threshold #1 log

14-26

14-29

thermal threshold #1 status

14-26

14-29

thermal threshold #2 log

14-26

14-29

thermal threshold #2 status

14-26

14-29

validation bit

14-26

IA32_TIME_STAMP_COUNTER MSR

35-278

IA32_VMX_BASIC MSR

24-3

31-2

31-5

31-6

31-11

35-55

35-66

35-74

35-119

35-156

35-273

35-298

35-311

A-1

A-2

IA32_VMX_CR0_FIXED0 MSR

31-4

35-55

35-66

35-74

35-120

35-156

35-273

35-299

35-312

A-6