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11-34 Vol. 3A

MEMORY CACHE CONTROL

11.12.1  Detecting Support for the PAT Feature

An operating system or executive can detect the availability of the PAT by executing the CPUID instruction with a 
value of 1 in the EAX register. Support for the PAT is indicated by the PAT flag (bit 16 of the values returned to EDX 
register). If the PAT is supported, the operating system or executive can use the IA32_PAT MSR to program the PAT. 
When memory types have been assigned to entries in the PAT, software can then use of the PAT-index bit (PAT) in 
the page-table and page-directory entries along with the PCD and PWT bits to assign memory types from the PAT 
to individual pages.
Note that there is no separate flag or control bit in any of the control registers that enables the PAT. The PAT is 
always enabled on all processors that support it, and the table lookup always occurs whenever paging is enabled, 
in all paging modes.

11.12.2 IA32_PAT 

MSR

The IA32_PAT MSR is located at MSR address 277H (see Chapter 35, “Model-Specific Registers (MSRs)”). Figure 
11-9.
 shows the format of the 64-bit IA32_PAT MSR.
The IA32_PAT MSR contains eight page attribute fields: PA0 through PA7. The three low-order bits of each field are 
used to specify a memory type. The five high-order bits of each field are reserved, and must be set to all 0s. Each 
of the eight page attribute fields can contain any of the memory type encodings specified in Table 11-10.

Note that for the P6 family processors, the IA32_PAT MSR is named the PAT MSR.

31

27

26

24

23

19

18

16

15

11

10

8

7

3

2

0

Reserved

PA3

Reserved

PA2

Reserved

PA1

Reserved

PA0

63

59

58

56

55

51

50

48

47

43

42

40

39

35

34

32

Reserved

PA7

Reserved

PA6

Reserved

PA5

Reserved

PA4

Figure 11-9.  IA32_PAT MSR

Table 11-10.  Memory Types That Can Be Encoded With PAT

Encoding

Mnemonic

00H

Uncacheable (UC)

01H

Write Combining (WC)

02H

Reserved*

03H

Reserved*

04H

Write Through (WT)

05H

Write Protected (WP)

06H

Write Back (WB)

07H

Uncached (UC-)

08H - FFH

Reserved*

NOTE:

* Using these encodings will result in a general-protection exception (#GP).