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IA32_THERM_STATUS MSR

interrupt enable/disable flags

interrupt mechanisms

MWAIT extensions for

on die sensors

overview of

performance state transitions

14-21

sensor interrupt

10-1

setting thermal thresholds

software controlled clock modulation

status flags

status information

stop clock mechanism

thermal monitor 1 (TM1)

14-20

thermal monitor 2 (TM2)

14-20

TM flag, CPUID instruction

14-24

Thermal status bit

14-28

Thermal status log bit

Thermal threshold #1 log

Thermal threshold #1 status

Thermal threshold #2 log

Thermal threshold #2 status

Translation lookaside buffer (see TLB)

THERMTRIP# interrupt enable bit

14-27

14-30

thread timeout indicator

Threshold #1 interrupt enable bit

Threshold #1 value

Threshold #2 interrupt enable

Threshold #2 value

TI (table indicator) flag, segment selector

3-7

Timer, local APIC

10-16

Time-stamp counter

counting clockticks

18-103

description of

17-40

IA32_TIME_STAMP_COUNTER MSR

RDTSC instruction

reading

software drivers for

TSC flag

TSD flag

TLBs

description of

11-1

11-5

flushing

11-19

invalidating (flushing)

2-23

relationship to PGE flag

22-18

relationship to PSE flag

11-20

virtual TLBs

32-3

TM1 and TM2

See: thermal monitoring

14-20

TMR

Trigger Mode Register

TMR (Trigger Mode Register), local APIC

10-29

TPR

Task Priority Register

10-38

10-41

TR (trace message enable) flag

DEBUGCTLMSR MSR

Trace cache

Transcendental instruction accuracy

22-7

22-14

Trap gates

difference between interrupt and trap gates

6-14

for 16-bit and 32-bit code modules

21-1

handling a virtual-8086 mode interrupt or exception through

20-12

in IDT

6-10

introduction for IA-32e

introduction to

layout of

Traps

description of

6-5

restarting a program or task after

6-5

TS (task switched) flag

CR0 control register

TSD (time-stamp counter disable) flag

CR4 control register

TSS

16-bit TSS, structure of

7-15

32-bit TSS, structure of

7-3

64-bit mode

7-16

CR3 control register (PDBR)

description of

EFLAGS register

EFLAGS.NT

EIP

executing a task

floating-point save area

22-11

format in 64-bit mode

7-16

general-purpose registers

7-4

IA-32e mode

2-5

initialization for multitasking

9-10

interrupt stack table

7-17

invalid TSS exception

6-31

IRET instruction

7-12

I/O map base address field

I/O permission bit map

7-17

LDT segment selector field

7-4

7-14

link field

6-14

order of reads/writes to

pointed to by task-gate descriptor

7-8

previous task link field

7-4

7-12

7-13

privilege-level 0, 1, and 2 stacks

5-17

referenced by task gate

segment registers

T (debug trap) flag

task register

using 16-bit TSSs in a 32-bit environment

virtual-mode extensions

TSS descriptor

B (busy) flag

busy flag

7-13

initialization for multitasking

9-10

structure of

7-6

TSS segment selector

field, task-gate descriptor

7-8

writes