Vol. 3B 14-19

POWER AND THERMAL MANAGEMENT

NOTE

If MWAIT is used to enter a C-state (including sub C-state) that is numerically higher than C1, a 
store to the address range armed by MONITOR instruction will cause the processor to exit MWAIT if 
the store was originated by other processor agents. A store from non-processor agent may not 
cause the processor to exit MWAIT. 

14.7 

THERMAL MONITORING AND PROTECTION

The IA-32 architecture provides the following mechanisms for monitoring temperature and controlling thermal 
power:
1. The catastrophic shutdown detector forces processor execution to stop if the processor’s core temperature 

rises above a preset limit.

2. Automatic and adaptive thermal monitoring mechanisms force the processor to reduce it’s power 

consumption in order to operate within predetermined temperature limits.

3. The software controlled clock modulation mechanism permits operating systems to implement power 

management policies that reduce power consumption; this is in addition to the reduction offered by automatic 
thermal monitoring mechanisms.

4. On-die digital thermal sensor and interrupt mechanisms permit the OS to manage thermal conditions 

natively without relying on BIOS or other system board components.

The first mechanism is not visible to software. The other three mechanisms are visible to software using processor 
feature information returned by executing CPUID with EAX = 1.
The second mechanism includes: 

•

Automatic thermal monitoring provides two modes of operation. One mode modulates the clock duty cycle; 
the second mode changes the processor’s frequency. Both modes are used to control the core temperature of 
the processor.

•

Adaptive thermal monitoring can provide flexible thermal management on processors made of multiple 
cores.

The third mechanism modulates the clock duty cycle of the processor. As shown in Figure 14-20, the phrase ‘duty 
cycle’ does not refer to the actual duty cycle of the clock signal. Instead it refers to the time period during which 
the clock signal is allowed to drive the processor chip. By using the stop clock mechanism to control how often the 
processor is clocked, processor power consumption can be modulated. 

For previous automatic thermal monitoring mechanisms, software controlled mechanisms that changed processor 
operating parameters to impact changes in thermal conditions. Software did not have native access to the native 
thermal condition of the processor; nor could software alter the trigger condition that initiated software program 
control. 
The fourth mechanism (listed above) provides access to an on-die digital thermal sensor using a model-specific 
register and uses an interrupt mechanism to alert software to initiate digital thermal monitoring. 

Figure 14-20.  Processor Modulation Through Stop-Clock Mechanism

Clock Applied to Processor

Stop-Clock Duty Cycle

25% Duty Cycle (example only)