Vol. 3A 10-41
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
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x2APIC mode: IA32_APIC_BASE[EN]=1 and IA32_APIC_BASE[EXTD]=1
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Invalid: IA32_APIC_BASE[EN]=0 and IA32_APIC_BASE[EXTD]=1
The state corresponding to EXTD=1 and EN=0 is not valid and it is not possible to get into this state. An execution
of WRMSR to the IA32_APIC_BASE_MSR that attempts a transition from a valid state to this invalid state causes a
general-protection exception. Figure 10-27 shows the comprehensive state transition diagram for a local x2APIC
unit.
On coming out of reset, the local APIC unit is enabled and is in the xAPIC mode: IA32_APIC_BASE[EN]=1 and
IA32_APIC_BASE[EXTD]=0. The APIC registers are initialized as:
•
The local APIC ID is initialized by hardware with a 32 bit ID (x2APIC ID). The lowest 8 bits of the x2APIC ID is
the legacy local xAPIC ID, and is stored in the upper 8 bits of the APIC register for access in xAPIC mode.
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The following APIC registers are reset to all zeros for those fields that are defined in the xAPIC mode:
— IRR, ISR, TMR, ICR, LDR, TPR, Divide Configuration Register (See Chapter 8 of “Intel® 64 and IA-32 Archi-
tectures Software Developer’s Manual“, Vol. 3B for details of individual APIC registers),
— Timer initial count and timer current count registers,
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The LVT registers are reset to 0s except for the mask bits; these are set to 1s.
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The local APIC version register is not affected.
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The Spurious Interrupt Vector Register is initialized to 000000FFH.
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The DFR (available only in xAPIC mode) is reset to all 1s.
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SELF IPI register is reset to zero.
x2APIC After Reset
The valid transitions from the xAPIC mode state are:
•
to the x2APIC mode by setting EXT to 1 (resulting EN=1, EXTD= 1). The physical x2APIC ID (see Figure 10-6)
is preserved across this transition and the logical x2APIC ID (see Figure 10-29) is initialized by hardware during
this transition as documented in Section 10.12.10.2. The state of the extended fields in other APIC registers,
Figure 10-27. Local x2APIC State Transitions with IA32_APIC_BASE, INIT, and Reset
xAPIC Mode
EN =1
Illegal
Transition
Init
EN=1, Extd=1
Extended
Invalid
State
Mode
Reset
Extd = 1
Illegal
Transition
EN = 0
EN = 0
Illegal
Transition
Extd = 0
Illegal
Transition
Extd = 0
EN=1, Extd=0
EN = 0
Extd = 1
Reset
Reset
Init
Init
Disabled
EN = 0
Extd = 0
Extd = 1
EN = 0