Page 1973

Vol. 3D INDEX-9

INDEX

16-bit, interlevel return from

22-32

clearing IF flag

6-7

6-14

difference between interrupt and trap gates

6-14

for 16-bit and 32-bit code modules

21-1

handling a virtual-8086 mode interrupt or exception through

in IDT

introduction to

layout of

Interrupt handler

calling

6-11

defined

6-1

flag usage by handler procedure

6-14

procedures

6-11

protection of handler procedures

6-13

task

6-14

7-2

Interrupts

automatic bus locking

22-34

control transfers between 16- and 32-bit code modules

description of

destination

distribution mechanism, local APIC

10-24

enabling and disabling

6-6

handling

6-11

handling in real-address mode

20-4

handling in SMM

34-10

handling in virtual-8086 mode

20-11

handling multiple NMIs

6-6

handling through a task gate in virtual-8086 mode

20-14

handling through a trap or interrupt gate in virtual-8086 mode

IA-32e mode

IDT

IDTR

initializing for protected-mode operation

9-10

interrupt descriptor table register (see IDTR)

interrupt descriptor table (see IDT)

list of

6-2

20-6

local APIC

10-1

maskable hardware interrupts

2-10

masking maskable hardware interrupts

6-6

masking when switching stack segments

6-7

message signalled interrupts

10-33

on-die sensors for

14-19

overview of

6-1

priorities among simultaneous exceptions and interrupts

priority

propagation delay

real-address mode

restarting a task or program

software

sources of

summary of

thermal monitoring

user defined

valid APIC interrupts

vectors

virtual-8086 mode

INTO instruction

INTR# pin

Invalid opcode exception (#UD)

Invalid TSS exception (#TS)

6-31

7-6

Invalid-operation exception, x87 FPU

INVD instruction

INVLPG instruction

IOPL (I/O privilege level) field, EFLAGS register

description of

2-10

on return from exception, interrupt handler

6-13

sensitive instructions in virtual-8086 mode

20-10

virtual interrupt

2-11

IPI (see interprocessor interrupt)

IRET instruction

IRETD instruction

IRR

Interrupt Request Register

10-38

10-41

10-46

IRR (interrupt request register), local APIC

10-29

ISR

In Service Register

10-38

10-41

10-46

I/O

breakpoint exception conditions

17-9

in virtual-8086 mode

20-10

instruction restart flag

SMM revision identifier field

34-15

instruction restart flag, SMM revision identifier field

34-15

IO_SMI bit

34-12

I/O permission bit map, TSS

7-5

map base address field, TSS

7-5

restarting following SMI interrupt

saving I/O state

SMM state save map

I/O APIC

bus arbitration

description of

external interrupts

information about

interrupt sources

local APIC and I/O APIC

overview of

valid interrupts