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Vol. 3B 20-19

8086 EMULATION

operation as it does for method 2 software interrupt handling. If the corresponding bit for the software interrupt in 
the software interrupt redirection bit map is set to 0, the interrupt is handled using method 6 (see Section 
20.3.3.5, “Method 6: Software Interrupt Handling”).

20.3.3.3   Method 4: Software Interrupt Handling

Method 4 handling is enabled when the VME flag is set to 1, the IOPL value is 3, and the bit for the interrupt vector 
in the redirection bit map is set to 1. Method 4 software interrupt handling allows method 1 style handling when the 
virtual mode extension is enabled; that is, the interrupt is directed to a protected-mode handler (see Section 
20.3.3.1, “Method 1: Software Interrupt Handling”).

20.3.3.4   Method 5: Software Interrupt Handling

Method 5 software interrupt handling provides a streamlined method of redirecting software interrupts (invoked 
with the INT n instruction) that occur in virtual 8086 mode back to the 8086 program’s interrupt vector table and 
its interrupt handlers. Method 5 handling is enabled when the VME flag is set to 1, the IOPL value is 3, and the bit 
for the interrupt vector in the redirection bit map is set to 0. The processor performs the following actions to make 
an implicit call to the selected 8086 program interrupt handler:
1. Pushes the low-order 16 bits of the EFLAGS register onto the stack.
2. Pushes the current values of the CS and EIP registers onto the current stack. (Only the 16 least-significant bits 

of the EIP register are pushed and no stack switch occurs.)

3. Clears the IF flag in the EFLAGS register to disable interrupts.
4. Clears the TF flag, in the EFLAGS register.
5. Locates the 8086 program interrupt vector table at linear address 0 for the 8086-mode task.
6. Loads the CS and EIP registers with values from the interrupt vector table entry pointed to by the interrupt 

vector number. Only the 16 low-order bits of the EIP are loaded and the 16 high-order bits are set to 0. The 
interrupt vector table is assumed to be at linear address 0 of the current virtual-8086 task.

7. Begins executing the selected interrupt handler.
An IRET instruction at the end of the handler procedure reverses these steps to return program control to the inter-
rupted 8086 program.
Note that with method 5 handling, a mode switch from virtual-8086 mode to protected mode does not occur. The 
processor remains in virtual-8086 mode throughout the interrupt-handling operation.
The method 5 handling actions are virtually identical to the actions the processor takes when handling software 
interrupts in real-address mode. The benefit of using method 5 handling to access the 8086 program handlers is 
that it avoids the overhead of methods 2 and 3 handling, which requires first going to the virtual-8086 monitor, 
then to the 8086 program handler, then back again to the virtual-8086 monitor, before returning to the interrupted 
8086 program (see Section 20.3.1.2, “Handling an Interrupt or Exception With an 8086 Program Interrupt or 
Exception Handler”). 

NOTE

Methods 1 and 4 handling can handle a software interrupt in a virtual-8086 task with a regular 
protected-mode handler, but this approach requires all virtual-8086 tasks to use the same software 
interrupt handlers, which generally does not give sufficient latitude to the programs running in the 
virtual-8086 tasks, particularly MS-DOS programs.

20.3.3.5   Method 6: Software Interrupt Handling

Method 6 handling is enabled when the VME flag is set to 1, the IOPL value is less than 3, and the bit for the inter-
rupt or exception vector in the redirection bit map is set to 0. With method 6 interrupt handling, software interrupts 
are handled in the same manner as was described for method 5 handling (see Section 20.3.3.4, “Method 5: Soft-
ware Interrupt Handling”).