INDEX
INDEX-16 Vol. 3D
RPL field
TI (table indicator) flag
Segmented addressing
,
Segment-not-present exception (#NP)
,
Segments
64-bit mode
basic flat model
,
code type
combining segment, page-level protection
,
combining with paging
,
compatibility mode
,
data type
,
defined
,
disabling protection of
,
enabling protection of
mapping to pages
,
multisegment usage model
protected flat model
segment-level protection
,
,
segment-not-present exception
,
system
types, checking access rights
,
typing
using
wraparound
,
SELF IPI register
Self-modifying code, effect on caches
Serializing
,
Serializing instructions
CPUID
HT technology
non-privileged
,
privileged
,
SF (stack fault) flag, x87 FPU status word
,
SFENCE instruction
,
,
SGDT instruction
,
Shared resources
mapping of
,
Shutdown
resulting from double fault
,
resulting from out of IDT limit condition
,
SIDT instruction
,
SIMD floating-point exception (#XM)
,
SIMD floating-point exceptions
description of
,
handler
support for
Single-stepping
breakpoint exception condition
on branches
,
on exceptions
on interrupts
,
TF (trap) flag, EFLAGS register
SLDT instruction
SLTR instruction
SMBASE
default value
,
relocation of
SMI handler
description of
,
execution environment for
exiting from
VMX treatment of
,
SMI interrupt
,
description of
,
IO_SMI bit
,
priority
switching to SMM
synchronous and asynchronous
,
VMX treatment of
,
SMI# pin
,
,
SMM
asynchronous SMI
auto halt restart
executing the HLT instruction in
,
exiting from
,
handling exceptions and interrupts
introduction to
I/O instruction restart
,
I/O state implementation
,
native 16-bit mode
,
overview of
,
revision identifier
,
revision identifier field
,
switching to
,
switching to from other operating modes
synchronous SMI
VMX operation
default RSM treatment
default SMI delivery
,
dual-monitor treatment
overview
protecting CR4.VMXE
RSM instruction
SMM monitor
SMM VM exits
,
SMM-transfer VMCS
,
SMM-transfer VMCS pointer
VMCS pointer preservation
,
VMX-critical state
,
SMRAM
caching
,
state save map
structure of
,
SMSW instruction
,
SNaN, compatibility, IA-32 processors
,
Snooping mechanism
,
Software controlled clock
modulation control bits
power consumption
,
Software interrupts
,
Software-controlled bus locking
Split pages
,
Spurious interrupt, local APIC
SSE extensions
checking for with CPUID
checking support for FXSAVE/FXRSTOR
,
CPUID feature flag
,
EM flag
,
emulation of
,
facilities for automatic saving of state
,
initialization
,
introduction of into the IA-32 architecture
,
providing exception handlers for
,
providing operating system support for
,
saving and restoring state
,
saving state on task, context switches
,
SIMD Floating-point exception (#XM)
using TS flag to control saving of state
SSE feature flag
CPUID instruction
,
SSE2 extensions
checking for with CPUID
checking support for FXSAVE/FXRSTOR
,
CPUID feature flag
,
EM flag
,
emulation of
,
facilities for automatic saving of state
,
initialization
,
introduction of into the IA-32 architecture
,
providing exception handlers for
,
providing operating system support for
,
saving and restoring state
,
saving state on task, context switches
,