34-14 Vol. 3C

SYSTEM MANAGEMENT MODE

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It can leave the auto HALT restart flag set, which instructs the RSM instruction to return program control to the 
HLT instruction. This option in effect causes the processor to re-enter the HALT state after handling the SMI. 
(This is the default operation.)

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It can clear the auto HALT restart flag, which instructs the RSM instruction to return program control to the 
instruction following the HLT instruction. 

These options are summarized in Table 34-7. If the processor was not in a HALT state when the SMI was received 
(the auto HALT restart flag is cleared), setting the flag to 1 will cause unpredictable behavior when the RSM instruc-
tion is executed.

If the HLT instruction is restarted, the processor will generate a memory access to fetch the HLT instruction (if it is 
not in the internal cache), and execute a HLT bus transaction. This behavior results in multiple HLT bus transactions 
for the same HLT instruction.

34.10.1  Executing the HLT Instruction in SMM

The HLT instruction should not be executed during SMM, unless interrupts have been enabled by setting the IF flag 
in the EFLAGS register. If the processor is halted in SMM, the only event that can remove the processor from this 
state is a maskable hardware interrupt or a hardware reset.

34.11 SMBASE 

RELOCATION

The default base address for the SMRAM is 30000H. This value is contained in an internal processor register called 
the SMBASE register. The operating system or executive can relocate the SMRAM by setting the SMBASE field in the 
saved state map (at offset 7EF8H) to a new value (see Figure 34-4). The RSM instruction reloads the internal 
SMBASE register with the value in the SMBASE field each time it exits SMM. All subsequent SMI requests will use 
the new SMBASE value to find the starting address for the SMI handler (at SMBASE + 8000H) and the SMRAM state 
save area (from SMBASE + FE00H to SMBASE + FFFFH). (The processor resets the value in its internal SMBASE 
register to 30000H on a RESET, but does not change it on an INIT.) 

 

Figure 34-3.  Auto HALT Restart Field

Table 34-7.  Auto HALT Restart Flag Values

Value of Flag After 

Entry to SMM

Value of Flag When 

Exiting SMM

Action of Processor When Exiting SMM

0
0
1
1

0
1
0
1

Returns to next instruction in interrupted program or task.
Unpredictable.
Returns to next instruction after HLT instruction.
Returns to HALT state.

Auto HALT Restart

0

15

Reserved

Register Offset
7F02H

1