34-18 Vol. 3C

SYSTEM MANAGEMENT MODE

IF internal storage indicates that the logical processor
had been in VMX operation (root or non-root)

THEN

enter VMX operation (root or non-root);
restore VMX-critical state as defined in Section 34.14.1;
set to their fixed values any bits in CR0 and CR4 whose values must be fixed in VMX operation (see Section 23.8);

1

IF RFLAGS.VM = 0 AND (in VMX root operation OR the “unrestricted guest” VM-execution control is 0)

2

THEN

CS.RPL ← SS.DPL;

SS.RPL ← SS.DPL;

FI;
restore current VMCS pointer;

FI;
leave SMM;
IF logical processor will be in VMX operation or in SMX operation after RSM

THEN block A20M and leave A20M mode;

FI;

FI;
RSM unblocks SMIs. It restores the state of blocking by NMI (see Table 24-3 in Section 24.4.2) as follows:

•

If the RSM is not to VMX non-root operation or if the “virtual NMIs” VM-execution control will be 0, the state of 
NMI blocking is restored normally.

•

If the RSM is to VMX non-root operation and the “virtual NMIs” VM-execution control will be 1, NMIs are not 
blocked after RSM. The state of virtual-NMI blocking is restored as part of VMX-critical state.

INIT signals are blocked after RSM if and only if the logical processor will be in VMX root operation.
If RSM returns a logical processor to VMX non-root operation, it re-establishes the controls associated with the 
current VMCS. If the “interrupt-window exiting” VM-execution control is 1, a VM exit occurs immediately after RSM 
if the enabling conditions apply. The same is true for the “NMI-window exiting” VM-execution control. Such 
VM exits occur with their normal priority. See Section 25.2.
If an MTF VM exit was pending at the time of the previous SMI, an MTF VM exit is pending on the instruction 
boundary following execution of RSM. The following items detail the treatment of MTF VM exits that may be 
pending following RSM:

•

System-management interrupts (SMIs), INIT signals, and higher priority events take priority over these MTF 
VM exits. These MTF VM exits take priority over debug-trap exceptions and lower priority events. 

•

These MTF VM exits wake the logical processor if RSM caused the logical processor to enter the HLT state (see 
Section 34.10). They do not occur if the logical processor just entered the shutdown state.

34.14.3  Protection of CR4.VMXE in SMM

Under the default treatment, CR4.VMXE is treated as a reserved bit while a logical processor is in SMM. Any 
attempt by software running in SMM to set this bit causes a general-protection exception. In addition, software 
cannot use VMX instructions or enter VMX operation while in SMM.

34.14.4  VMXOFF and SMI Unblocking

The VMXOFF instruction can be executed only with the default treatment (see Section 34.15.1) and only outside 
SMM. If SMIs are blocked when VMXOFF is executed, VMXOFF unblocks them unless 

1. If the RSM is to VMX non-root operation and both the “unrestricted guest” VM-execution control and bit 31 of the primary proces-

sor-based VM-execution controls will be 1, CR0.PE and CR0.PG retain the values that were loaded from SMRAM regardless of what is 

reported in the capability MSR IA32_VMX_CR0_FIXED0.

2. “Unrestricted guest” is a secondary processor-based VM-execution control. If bit 31 of the primary processor-based VM-execution 

controls is 0, VM entry functions as if the “unrestricted guest” VM-execution control were 0. See Section 24.6.2.