6-34 Vol. 3A

INTERRUPT AND EXCEPTION HANDLING

Interrupt 11—Segment Not Present (#NP)

Exception Class

Fault.

Description

Indicates that the present flag of a segment or gate descriptor is clear. The processor can generate this exception 
during any of the following operations:

•

While attempting to load CS, DS, ES, FS, or GS registers. [Detection of a not-present segment while loading the 
SS register causes a stack fault exception (#SS) to be generated.] This situation can occur while performing a 
task switch.

•

While attempting to load the LDTR using an LLDT instruction. Detection of a not-present LDT while loading the 
LDTR during a task switch operation causes an invalid-TSS exception (#TS) to be generated.

•

When executing the LTR instruction and the TSS is marked not present.

•

While attempting to use a gate descriptor or TSS that is marked segment-not-present, but is otherwise valid.

An operating system typically uses the segment-not-present exception to implement virtual memory at the 
segment level. If the exception handler loads the segment and returns, the interrupted program or task resumes 
execution.
A not-present indication in a gate descriptor, however, does not indicate that a segment is not present (because 
gates do not correspond to segments). The operating system may use the present flag for gate descriptors to 
trigger exceptions of special significance to the operating system.
A contributory exception or page fault that subsequently referenced a not-present segment would cause a double 
fault (#DF) to be generated instead of #NP.

Exception Error Code

An error code containing the segment selector index for the segment descriptor that caused the violation is pushed 
onto the stack of the exception handler. If the EXT flag is set, it indicates that the exception resulted from either:

•

an external event (NMI or INTR) that caused an interrupt, which subsequently referenced a not-present 
segment

•

a benign exception that subsequently referenced a not-present segment 

The IDT flag is set if the error code refers to an IDT entry. This occurs when the IDT entry for an interrupt being 
serviced references a not-present gate. Such an event could be generated by an INT instruction or a hardware 
interrupt.

Saved Instruction Pointer

The saved contents of CS and EIP registers normally point to the instruction that generated the exception. If the 
exception occurred while loading segment descriptors for the segment selectors in a new TSS, the CS and EIP 
registers point to the first instruction in the new task. If the exception occurred while accessing a gate descriptor, 
the CS and EIP registers point to the instruction that invoked the access (for example a CALL instruction that refer-
ences a call gate).

Program State Change

If the segment-not-present exception occurs as the result of loading a register (CS, DS, SS, ES, FS, GS, or LDTR), 
a program-state change does accompany the exception because the register is not loaded. Recovery from this 
exception is possible by simply loading the missing segment into memory and setting the present flag in the 
segment descriptor.
If the segment-not-present exception occurs while accessing a gate descriptor, a program-state change does not 
accompany the exception. Recovery from this exception is possible merely by setting the present flag in the gate 
descriptor.
If a segment-not-present exception occurs during a task switch, it can occur before or after the commit-to-new-
task point (see Section 7.3, “Task Switching”). If it occurs before the commit point, no program state change