background image

Vol. 3A 4-47

PAGING

VPIDs provide a way for software to identify to the processor the address spaces for different “virtual processors.” 
The processor may use this identification to maintain concurrently information for multiple address spaces in its 
TLBs and paging-structure caches, even when non-zero PCIDs are not being used. See Section 28.1 for details.
When EPT is in use, the addresses in the paging-structures are not used as physical addresses to access memory 
and memory-mapped I/O. Instead, they are treated as guest-physical addresses and are translated through a 
set of EPT paging structures to produce physical addresses. EPT can also specify its own access rights and memory 
typing; these are used on conjunction with those specified in this chapter. See Section 28.2 for more information.
Both VPIDs and EPT may change the way that a processor maintains information in TLBs and paging structure 
caches and the ways in which software can manage that information. Some of the behaviors documented in 
Section 4.10 may change. See Section 28.3 for details.

4.12 

USING PAGING FOR VIRTUAL MEMORY

With paging, portions of the linear-address space need not be mapped to the physical-address space; data for the 
unmapped addresses can be stored externally (e.g., on disk). This method of mapping the linear-address space is 
referred to as virtual memory or demand-paged virtual memory.
Paging divides the linear address space into fixed-size pages that can be mapped into the physical-address space 
and/or external storage. When a program (or task) references a linear address, the processor uses paging to trans-
late the linear address into a corresponding physical address if such an address is defined.
If the page containing the linear address is not currently mapped into the physical-address space, the processor 
generates a page-fault exception as described in Section 4.7. The handler for page-fault exceptions typically 
directs the operating system or executive to load data for the unmapped page from external storage into physical 
memory (perhaps writing a different page from physical memory out to external storage in the process) and to 
map it using paging (by updating the paging structures). When the page has been loaded into physical memory, a 
return from the exception handler causes the instruction that generated the exception to be restarted.
Paging differs from segmentation through its use of fixed-size pages. Unlike segments, which usually are the same 
size as the code or data structures they hold, pages have a fixed size. If segmentation is the only form of address 
translation used, a data structure present in physical memory will have all of its parts in memory. If paging is used, 
a data structure can be partly in memory and partly in disk storage.

4.13 

MAPPING SEGMENTS TO PAGES

The segmentation and paging mechanisms provide support for a wide variety of approaches to memory manage-
ment. When segmentation and paging are combined, segments can be mapped to pages in several ways. To imple-
ment a flat (unsegmented) addressing environment, for example, all the code, data, and stack modules can be 
mapped to one or more large segments (up to 4-GBytes) that share same range of linear addresses (see 
Figure 3-2 in Section 3.2.2). Here, segments are essentially invisible to applications and the operating-system or 
executive. If paging is used, the paging mechanism can map a single linear-address space (contained in a single 
segment) into virtual memory. Alternatively, each program (or task) can have its own large linear-address space 
(contained in its own segment), which is mapped into virtual memory through its own paging structures.
Segments can be smaller than the size of a page. If one of these segments is placed in a page which is not shared 
with another segment, the extra memory is wasted. For example, a small data structure, such as a 1-Byte sema-
phore, occupies 4 KBytes if it is placed in a page by itself. If many semaphores are used, it is more efficient to pack 
them into a single page.
The Intel-64 and IA-32 architectures do not enforce correspondence between the boundaries of pages and 
segments. A page can contain the end of one segment and the beginning of another. Similarly, a segment can 
contain the end of one page and the beginning of another.
Memory-management software may be simpler and more efficient if it enforces some alignment between page and 
segment boundaries. For example, if a segment which can fit in one page is placed in two pages, there may be 
twice as much paging overhead to support access to that segment.