26-4 Vol. 3C
VM ENTRIES
•
If the “virtualize x2APIC mode” VM-execution control is 1, the “virtualize APIC accesses” VM-execution control
must be 0.
•
If the “virtual-interrupt delivery” VM-execution control is 1, the “external-interrupt exiting” VM-execution
control must be 1.
•
If the “process posted interrupts” VM-execution control is 1, the following must be true:
1
— The “virtual-interrupt delivery” VM-execution control is 1.
— The “acknowledge interrupt on exit” VM-exit control is 1.
— The posted-interrupt notification vector has a value in the range 0–255 (bits 15:8 are all 0).
— Bits 5:0 of the posted-interrupt descriptor address are all 0.
— The posted-interrupt descriptor address does not set any bits beyond the processor's physical-address
width.
2
•
If the “enable VPID” VM-execution control is 1, the value of the VPID VM-execution control field must not be
0000H.
3
•
If the “enable EPT” VM-execution control is 1, the EPTP VM-execution control field (see Table 24-8 in Section
24.6.11) must satisfy the following checks:
4
— The EPT memory type (bits 2:0) must be a value supported by the processor as indicated in the
IA32_VMX_EPT_VPID_CAP MSR (see Appendix A.10).
— Bits 5:3 (1 less than the EPT page-walk length) must be 3, indicating an EPT page-walk length of 4; see
— Bit 6 (enable bit for accessed and dirty flags for EPT) must be 0 if bit 21 of the IA32_VMX_EPT_VPID_CAP
MSR (see Appendix A.10) is read as 0, indicating that the processor does not support accessed and dirty
flags for EPT.
— Reserved bits 11:7 and 63:N (where N is the processor’s physical-address width) must all be 0.
•
If the “enable PML” VM-execution control is 1, the “enable EPT” VM-execution control must also be 1.
5
In
addition, the PML address must satisfy the following checks:
— Bits 11:0 of the address must be 0.
— The address should not set any bits beyond the processor’s physical-address width.
6
•
If the “unrestricted guest” VM-execution control is 1, the “enable EPT” VM-execution control must also be 1.
7
•
If the “enable VM functions” processor-based VM-execution control is 1, reserved bits in the VM-function
controls must be clear.
8
Software may consult the VMX capability MSRs to determine which bits are reserved
(see Appendix A.11). In addition, the following check is performed based on the setting of bits in the VM-
function controls (see Section 24.6.14):
— If “EPTP switching” VM-function control is 1, the “enable EPT” VM-execution control must also be 1. In
addition, the EPTP-list address must satisfy the following checks:
1. “Process posted interrupts” is a secondary processor-based VM-execution control. If bit 31 of the primary processor-based VM-exe-
cution controls is 0, VM entry functions as if the “process posted interrupts” VM-execution control were 0. See Section 24.6.2.
2. If IA32_VMX_BASIC[48] is read as 1, this address must not set any bits in the range 63:32; see Appendix A.1.
3. “Enable VPID” is a secondary processor-based VM-execution control. If bit 31 of the primary processor-based VM-execution controls
is 0, VM entry functions as if the “enable VPID” VM-execution control were 0. See Section 24.6.2.
4. “Enable EPT” is a secondary processor-based VM-execution control. If bit 31 of the primary processor-based VM-execution controls
is 0, VM entry functions as if the “enable EPT” VM-execution control were 0. See Section 24.6.2.
5. “Enable PML” and “enable EPT” are both secondary processor-based VM-execution controls. If bit 31 of the primary processor-based
VM-execution controls is 0, VM entry functions as if both these controls were 0. See Section 24.6.2.
6. If IA32_VMX_BASIC[48] is read as 1, this address must not set any bits in the range 63:32; see Appendix A.1.
7. “Unrestricted guest” and “enable EPT” are both secondary processor-based VM-execution controls. If bit 31 of the primary proces-
sor-based VM-execution controls is 0, VM entry functions as if both these controls were 0. See Section 24.6.2.
8. “Enable VM functions” is a secondary processor-based VM-execution control. If bit 31 of the primary processor-based VM-execution
controls is 0, VM entry functions as if the “enable VM functions” VM-execution control were 0. See Section 24.6.2.