Vol. 3C 24-21

VIRTUAL MACHINE CONTROL STRUCTURES

24.9 

VM-EXIT INFORMATION FIELDS

The VMCS contains a section of fields that contain information about the most recent VM exit.
On some processors, attempts to write to these fields with VMWRITE fail (see “VMWRITE—Write Field to Virtual-
Machine Control Structure” in Chapter 30).

1

24.9.1 

Basic VM-Exit Information

The following VM-exit information fields provide basic information about a VM exit:

•

Exit reason (32 bits). This field encodes the reason for the VM exit and has the structure given in Table 24-14.

— Bits 15:0 provide basic information about the cause of the VM exit (if bit 31 is clear) or of the VM-entry 

failure (if bit 31 is set). Appendix C enumerates the basic exit reasons.

— Bit 28 is set only by an SMM VM exit (see Section 34.15.2) that took priority over an MTF VM exit (see 

Section 25.5.2) that would have occurred had the SMM VM exit not occurred. See Section 34.15.2.3.

— Bit 29 is set if and only if the processor was in VMX root operation at the time the VM exit occurred. This can 

happen only for SMM VM exits. See Section 34.15.2.

— Because some VM-entry failures load processor state from the host-state area (see Section 26.7), software 

must be able to distinguish such cases from true VM exits. Bit 31 is used for that purpose.

•

Exit qualification (64 bits; 32 bits on processors that do not support Intel 64 architecture). This field contains 
additional information about the cause of VM exits due to the following: debug exceptions; page-fault 
exceptions; start-up IPIs (SIPIs); task switches; INVEPT; INVLPG;INVVPID; LGDT; LIDT; LLDT; LTR; SGDT; 
SIDT; SLDT; STR; VMCLEAR; VMPTRLD; VMPTRST; VMREAD; VMWRITE; VMXON; control-register accesses; 
MOV DR; I/O instructions; and MWAIT. The format of the field depends on the cause of the VM exit. See Section 
27.2.1 for details.

•

Guest-linear address (64 bits; 32 bits on processors that do not support Intel 64 architecture). This field is 
used in the following cases:
— VM exits due to attempts to execute LMSW with a memory operand.
— VM exits due to attempts to execute INS or OUTS.
— VM exits due to system-management interrupts (SMIs) that arrive immediately after retirement of I/O 

instructions.

— Certain VM exits due to EPT violations
See Section 27.2.1 and Section 34.15.2.3 for details of when and how this field is used.

1.  Software can discover whether these fields can be written by reading the VMX capability MSR IA32_VMX_MISC (see Appendix A.6).

Table 24-14.  Format of Exit Reason

Bit Position(s)

Contents

15:0

Basic exit reason

26:16

Reserved (cleared to 0)

27

A VM exit saves this bit as 1 to indicate that the VM exit was incident to enclave mode.

28

Pending MTF VM exit

29

VM exit from VMX root operation

30

Reserved (cleared to 0)

31

VM-entry failure (0 = true VM exit; 1 = VM-entry failure)