Vol. 3C 30-1

CHAPTER 30

VMX INSTRUCTION REFERENCE

NOTE

This chapter was previously located in the Intel® 64 and IA-32 Architectures Software Developer’s 
Manual, Volume 2B as chapter 5. 

30.1 OVERVIEW

This chapter describes the virtual-machine extensions (VMX) for the Intel 64 and IA-32 architectures. VMX is 
intended to support virtualization of processor hardware and a system software layer acting as a host to multiple 
guest software environments. The virtual-machine extensions (VMX) includes five instructions that manage the 
virtual-machine control structure (VMCS), four instructions that manage VMX operation, two TLB-management 
instructions, and two instructions for use by guest software. Additional details of VMX are described in Chapter 23 
through Chapter 29. 
The behavior of the VMCS-maintenance instructions is summarized below:

•

VMPTRLD — This instruction takes a single 64-bit source operand that is in memory. It makes the referenced 
VMCS active and current, loading the current-VMCS pointer with this operand and establishes the current VMCS 
based on the contents of VMCS-data area in the referenced VMCS region. Because this makes the referenced 
VMCS active, a logical processor may start maintaining on the processor some of the VMCS data for the VMCS.

•

VMPTRST — This instruction takes a single 64-bit destination operand that is in memory. The current-VMCS 
pointer is stored into the destination operand.

•

VMCLEAR — This instruction takes a single 64-bit operand that is in memory. The instruction sets the launch 
state of the VMCS referenced by the operand to “clear”, renders that VMCS inactive, and ensures that data for 
the VMCS have been written to the VMCS-data area in the referenced VMCS region. If the operand is the same 
as the current-VMCS pointer, that pointer is made invalid.

•

VMREAD — This instruction reads a component from a VMCS (the encoding of that field is given in a register 
operand) and stores it into a destination operand that may be a register or in memory.

•

VMWRITE — This instruction writes a component to a VMCS (the encoding of that field is given in a register 
operand) from a source operand that may be a register or in memory.

The behavior of the VMX management instructions is summarized below:

•

VMLAUNCH — This instruction launches a virtual machine managed by the VMCS. A VM entry occurs, trans-
ferring control to the VM.

•

VMRESUME — This instruction resumes a virtual machine managed by the VMCS. A VM entry occurs, trans-
ferring control to the VM.

•

VMXOFF — This instruction causes the processor to leave VMX operation.

•

VMXON — This instruction takes a single 64-bit source operand that is in memory. It causes a logical processor 
to enter VMX root operation and to use the memory referenced by the operand to support VMX operation.

The behavior of the VMX-specific TLB-management instructions is summarized below:

•

INVEPT — This instruction invalidates entries in the TLBs and paging-structure caches that were derived from 
extended page tables (EPT).

•

INVVPID — This instruction invalidates entries in the TLBs and paging-structure caches based on a Virtual-
Processor Identifier (VPID).

None of the instructions above can be executed in compatibility mode; they generate invalid-opcode exceptions if 
executed in compatibility mode.
The behavior of the guest-available instructions is summarized below:

•

VMCALL — This instruction allows software in VMX non-root operation to call the VMM for service. A VM exit 
occurs, transferring control to the VMM.