Vol. 1 13-1

CHAPTER 13

MANAGING STATE USING THE XSAVE FEATURE SET

The XSAVE feature set extends the functionality of the FXSAVE and FXRSTOR instructions (see Section 10.5, 
“FXSAVE and FXRSTOR Instructions”) by supporting the saving and restoring of processor state in addition to the 
x87 execution environment (x87 state) and the registers used by the streaming SIMD extensions (SSE state). 
The XSAVE feature set comprises eight instructions. XGETBV and XSETBV allow software to read and write the 
extended control register XCR0, which controls the operation of the XSAVE feature set. XSAVE, XSAVEOPT, 
XSAVEC, and XSAVES are four instructions that save processor state to memory; XRSTOR and XRSTORS are corre-
sponding instructions that load processor state from memory. XGETBV, XSAVE, XSAVEOPT, XSAVEC, and XRSTOR 
can be executed at any privilege level; XSETBV, XSAVES, and XRSTORS can be executed only if CPL = 0. In addition 
to XCR0, the XSAVES and XRSTORS instructions are controlled also by the IA32_XSS MSR (index DA0H).
The XSAVE feature set organizes the state that manages into state components. Operation of the instructions is 
based on state-component bitmaps that have the same format as XCR0 and as the IA32_XSS MSR: each bit 
corresponds to a state component. Section 13.1 discusses these state components and bitmaps in more detail.
Section 13.2 describes how the processor enumerates support for the XSAVE feature set and for XSAVE-enabled 
features (those features that require use of the XSAVE feature set for their enabling). Section 13.3 explains how 
software can enable the XSAVE feature set and XSAVE-enabled features.
The XSAVE feature set allows saving and loading processor state from a region of memory called an XSAVE area. 
Section 13.4 presents details of the XSAVE area and its organization. Each XSAVE-managed state component is 
associated with a section of the XSAVE area. Section 13.5 describes in detail each of the XSAVE-managed state 
components.
Section 13.7 through Section 13.12 describe the operation of XSAVE, XRSTOR, XSAVEOPT, XSAVEC, XSAVES, and 
XRSTORS, respectively.

13.1 

XSAVE-SUPPORTED FEATURES AND STATE-COMPONENT BITMAPS

The XSAVE feature set supports the saving and restoring of state components, each of which is a discrete set of 
processor registers (or parts of registers). In general, each such state component corresponds to a particular CPU 
feature. Such a feature is XSAVE-supported. Some XSAVE-supported features use registers in multiple XSAVE-
managed state components.
The XSAVE feature set organizes the state components of the XSAVE-supported features using state-component 
bitmaps. A state-component bitmap comprises 64 bits; each bit in such a bitmap corresponds to a single state 
component. The following bits are defined in state-component bitmaps:

•

Bit 0 corresponds to the state component used for the x87 FPU execution environment (x87 state). See 
Section 13.5.1.

•

Bit 1 corresponds to the state component used for registers used by the streaming SIMD extensions (SSE 
state). See Section 13.5.2.

•

Bit 2 corresponds to the state component used for the additional register state used by the Intel

®

 Advanced 

Vector Extensions (AVX state). See Section 13.5.3.

•

Bits 4:3 correspond to the two state components used for the additional register state used by Intel

®

 Memory 

Protection Extensions (MPX state):
— State component 3 is used for the 4 128-bit bounds registers BND0–BND3 (BNDREGS state).
— State component 4 is used for the 64-bit user-mode MPX configuration register BNDCFGU and the 64-bit 

MPX status register BNDSTATUS (BNDCSR state).

•

Bits 7:5 correspond to the three state components used for the additional register state used by Intel

®

 

Advanced Vector Extensions 512 (AVX-512 state):
— State component 5 is used for the 8 64-bit opmask registers k0–k7 (opmask state).