Vol. 3C 35-141
MODEL-SPECIFIC REGISTERS (MSRS)
35.8
MSRS IN THE INTEL
®
XEON
®
PROCESSOR E7 FAMILY (BASED ON INTEL
®
MICROARCHITECTURE CODE NAME WESTMERE)
Intel
®
Xeon
®
Processor E7 Family (based on Intel
®
microarchitecture code name Westmere) supports the MSR
interfaces listed in Table 35-13 (except MSR address 1ADH), Table 35-14, plus additional MSR listed in Table 35-17.
These processors have a CPUID signature with DisplayFamily_DisplayModel of 06_2FH.
Table 35-17. Additional MSRs Supported by Intel® Xeon® Processor E7 Family
Register
Address
Register Name
Scope
Bit Description
Hex
Dec
13CH
52
MSR_FEATURE_CONFIG
Core
AES Configuration (RW-L)
Privileged post-BIOS agent must provide a #GP handler to handle
unsuccessful read of this MSR.
1:0
AES Configuration (RW-L)
Upon a successful read of this MSR, the configuration of AES
instruction set availability is as follows:
11b: AES instructions are not available until next RESET.
otherwise, AES instructions are available.
Note, AES instruction set is not available if read is unsuccessful. If
the configuration is not 01b, AES instruction can be mis-configured
if a privileged agent unintentionally writes 11b.
63:2
Reserved.
1A7H
423
MSR_OFFCORE_RSP_1
Thread
Offcore Response Event Select Register (R/W)
1ADH
429
MSR_TURBO_RATIO_LIMIT
Package
Reserved
Attempt to read/write will cause #UD.
1B0H
432
IA32_ENERGY_PERF_BIAS
Package
See Table 35-2.
F40H
3904
MSR_C8_PMON_BOX_CTRL Package
Uncore C-box 8 perfmon local box control MSR.
F41H
3905
MSR_C8_PMON_BOX_
STATUS
Package
Uncore C-box 8 perfmon local box status MSR.
F42H
3906
MSR_C8_PMON_BOX_OVF_
CTRL
Package
Uncore C-box 8 perfmon local box overflow control MSR.
F50H
3920
MSR_C8_PMON_EVNT_
SEL0
Package
Uncore C-box 8 perfmon event select MSR.
F51H
3921
MSR_C8_PMON_CTR0
Package
Uncore C-box 8 perfmon counter MSR.
F52H
3922
MSR_C8_PMON_EVNT_
SEL1
Package
Uncore C-box 8 perfmon event select MSR.
F53H
3923
MSR_C8_PMON_CTR1
Package
Uncore C-box 8 perfmon counter MSR.
F54H
3924
MSR_C8_PMON_EVNT_
SEL2
Package
Uncore C-box 8 perfmon event select MSR.
F55H
3925
MSR_C8_PMON_CTR2
Package
Uncore C-box 8 perfmon counter MSR.
F56H
3926
MSR_C8_PMON_EVNT_
SEL3
Package
Uncore C-box 8 perfmon event select MSR.
F57H
3927
MSR_C8_PMON_CTR3
Package
Uncore C-box 8 perfmon counter MSR.