4-28 Vol. 3A
PAGING
.
4.6 ACCESS
RIGHTS
There is a translation for a linear address if the processes described in Section 4.3, Section 4.4.2, and Section 4.5
(depending upon the paging mode) completes and produces a physical address. Whether an access is permitted by
a translation is determined by the access rights specified by the paging-structure entries controlling the transla-
tion;
1
paging-mode modifiers in CR0, CR4, and the IA32_EFER MSR; EFLAGS.AC; and the mode of the access.
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
5
2
5
1
M
1
NOTES:
1. M is an abbreviation for MAXPHYADDR.
M-1
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0 9 8 7 6 5 4 3 2 1 0
Reserved
2
2. Reserved fields must be 0.
Address of PML4 table
Ignored
P
C
D
P
W
T
Ign.
CR3
X
D
3
3. If IA32_EFER.NXE = 0 and the P flag of a paging-structure entry is 1, the XD flag (bit 63) is reserved.
Ignored
Rsvd.
Address of page-directory-pointer table
Ign. Rs
vd
I
g
n
A
P
C
D
P
W
T
U
/S
R
/
W
1 PML4E:
present
Ignored
0
PML4E:
not
present
X
D
Prot.
Key
4
4. If CR4.PKE = 0, the protection key is ignored.
Ignored
Rsvd.
Address of
1GB page frame
Reserved
P
A
T
Ign. G 1 D A
P
C
D
P
W
T
U
/S
R
/
W
1
PDPTE:
1GB
page
X
D
Ignored
Rsvd.
Address of page directory
Ign.
0
I
g
n
A
P
C
D
P
W
T
U
/S
R
/
W
1
PDPTE:
page
directory
Ignored
0
PDTPE:
not
present
X
D
Prot.
Key
Ignored
Rsvd.
Address of
2MB page frame
Reserved
P
A
T
Ign. G 1 D A
P
C
D
P
W
T
U
/S
R
/
W
1
PDE:
2MB
page
X
D
Ignored
Rsvd.
Address of page table
Ign.
0
I
g
n
A
P
C
D
P
W
T
U
/S
R
/
W
1
PDE:
page
table
Ignored
0
PDE:
not
present
X
D
Prot.
Key
Ignored
Rsvd.
Address of 4KB page frame
Ign. G
P
A
T
D A
P
C
D
P
W
T
U
/S
R
/
W
1
PTE:
4KB
page
Ignored
0
PTE:
not
present
Figure 4-11. Formats of CR3 and Paging-Structure Entries with IA-32e Paging
1. With PAE paging, the PDPTEs do not determine access rights.