Vol. 3C 29-7

APIC VIRTUALIZATION AND VIRTUAL INTERRUPTS

— 020H–023H (local APIC ID);
— 030H–033H (local APIC version);
— 080H–083H (task priority);
— 0B0H–0B3H (end of interrupt);
— 0D0H–0D3H (logical destination);
— 0E0H–0E3H (destination format);
— 0F0H–0F3H (spurious-interrupt vector);
— 100H–103H, 110H–113H, 120H–123H, 130H–133H, 140H–143H, 150H–153H, 160H–163H, or 170H–

173H (in-service);

— 180H–183H, 190H–193H, 1A0H–1A3H, 1B0H–1B3H, 1C0H–1C3H, 1D0H–1D3H, 1E0H–1E3H, or 1F0H–

1F3H (trigger mode);

— 200H–203H, 210H–213H, 220H–223H, 230H–233H, 240H–243H, 250H–253H, 260H–263H, or 270H–

273H (interrupt request);

— 280H–283H (error status);
— 300H–303H or 310H–313H (interrupt command);
— 320H–323H, 330H–333H, 340H–343H, 350H–353H, 360H–363H, or 370H–373H (LVT entries);
— 380H–383H (initial count); or
— 3E0H–3E3H (divide configuration).
In all other cases, the access causes an APIC-access VM exit.

A read access from the APIC-access page that is virtualized returns data from the corresponding page offset on the 
virtual-APIC page.

4

29.4.3 Virtualizing 

Writes to the APIC-Access Page

Whether a write access to the APIC-access page is virtualized depends on the settings of the VM-execution controls 
and the page offset of the access. Section 29.4.3.1 details when APIC-write virtualization occurs.
Unlike reads, writes to the local APIC have side effects; because of this, virtualization of writes to the APIC-access 
page may require emulation specific to the access’s page offset (which identifies the APIC register being accessed). 
Section 29.4.3.2 describes this APIC-write emulation.
For some page offsets, it is necessary for software to complete the virtualization after a write completes. In these 
cases, the processor causes an APIC-write VM exit to invoke VMM software. Section 29.4.3.3 discusses APIC-
write VM exits.

29.4.3.1   Determining Whether a Write Access is Virtualized

A write access to the APIC-access page causes an APIC-access VM exit if any of the following are true:

•

The “use TPR shadow” VM-execution control is 0.

•

The access is more than 32 bits in size.

•

The access is part of an operation for which the processor has already virtualized a write (with a different page 
offset or a different size) to the APIC-access page.

•

The access is not entirely contained within the low 4 bytes of a naturally aligned 16-byte region. That is, bits 
3:2 of the access’s address are 0, and the same is true of the address of the highest byte accessed.

If none of the above are true, whether a write access is virtualized depends on the settings of the “APIC-register 
virtualization” and “virtual-interrupt delivery” VM-execution controls:

4. The memory type used for accesses that read from the virtual-APIC page is reported in bits 53:50 of the IA32_VMX_BASIC MSR 

(see Appendix A.1).