9-2 Vol. 3A

PROCESSOR MANAGEMENT AND INITIALIZATION

9.1.1 

Processor State After Reset

Following power-up, The state of control register CR0 is 60000010H (see Figure 9-1). This places the processor is 
in real-address mode with paging disabled. 

The state of the flags and other registers following power-up for the Pentium 4, Pentium Pro, and Pentium proces-
sors are shown in Section 22.39, “Initial State of Pentium, Pentium Pro and Pentium 4 Processors” of the Intel® 64 
and IA-32 Architectures Software Developer’s Manual, Volume 3B.
Table 9-1 shows processor states of IA-32 and Intel 64 processors with CPUID DisplayFamily signature of 06H at 
the following events: power-up, Rest, and INIT. In a few cases, the behavior of some registers behave slightly 
different across warm RESET, the variant cases are marked in Table 9-1 and described in more detail in Table 9-2.

Figure 9-1.  Contents of CR0 Register after Reset

Table 9-1.  IA-32 and Intel 64 Processor States Following Power-up, Reset, or INIT 

Register

Power up

Reset

INIT

EFLAGS

1

00000002H

00000002H

00000002H

EIP

0000FFF0H

0000FFF0H

0000FFF0H

CR0

60000010H

2

60000010H

2

60000010H

2

CR2, CR3, CR4

00000000H

00000000H

00000000H

CS

Selector = F000H

Base = FFFF0000H

Limit = FFFFH

AR = Present, R/W, Accessed

Selector = F000H

Base = FFFF0000H

Limit = FFFFH

AR = Present, R/W, Accessed

Selector = F000H

Base = FFFF0000H

Limit = FFFFH

AR = Present, R/W, Accessed

SS, DS, ES, FS, GS

Selector = 0000H

Base = 00000000H

Limit = FFFFH

AR = Present, R/W, Accessed

Selector = 0000H

Base = 00000000H

Limit = FFFFH

AR = Present, R/W, Accessed

Selector = 0000H

Base = 00000000H

Limit = FFFFH

AR = Present, R/W, Accessed

EDX

000n06xxH

3

 000n06xxH

3

 000n06xxH

3

 

EAX

0

4

0

4

0

4

EBX, ECX, ESI, EDI, EBP, ESP

00000000H

00000000H

00000000H

ST0 through ST7

5

+0.0

+0.0

FINIT/FNINIT: Unchanged

External x87 FPU error reporting: 0
(Not used): 1
No task switch: 0
x87 FPU instructions not trapped: 0
WAIT/FWAIT instructions not trapped: 0
Real-address mode: 0

31

19

16 15

0

P
E

1

2

3

4

5

6

17

18

28

29

30

M

P

E

M

1

N
E

T
S

P
G

C
D

N

W

W

P

A

M

Paging disabled: 0

Alignment check disabled: 0

Caching disabled: 1
Not write-through disabled: 1

Write-protect disabled: 0

Reserved

Reserved