Vol. 3A 4-27
PAGING
Table 4-19. Format of an IA-32e Page-Table Entry that Maps a 4-KByte Page
Bit
Position(s)
Contents
0 (P)
Present; must be 1 to map a 4-KByte page
1 (R/W)
Read/write; if 0, writes may not be allowed to the 4-KByte page referenced by this entry (see Section 4.6)
2 (U/S)
User/supervisor; if 0, user-mode accesses are not allowed to the 4-KByte page referenced by this entry (see Section
3 (PWT)
Page-level write-through; indirectly determines the memory type used to access the 4-KByte page referenced by
this entry (see Section 4.9.2)
4 (PCD)
Page-level cache disable; indirectly determines the memory type used to access the 4-KByte page referenced by this
entry (see Section 4.9.2)
5 (A)
Accessed; indicates whether software has accessed the 4-KByte page referenced by this entry (see Section 4.8)
6 (D)
Dirty; indicates whether software has written to the 4-KByte page referenced by this entry (see Section 4.8)
7 (PAT)
Indirectly determines the memory type used to access the 4-KByte page referenced by this entry (see Section 4.9.2)
8 (G)
Global; if CR4.PGE = 1, determines whether the translation is global (see Section 4.10); ignored otherwise
11:9
Ignored
(M–1):12
Physical address of the 4-KByte page referenced by this entry
51:M
Reserved (must be 0)
58:52
Ignored
62:59
Protection key; if CR4.PKE = 1, determines the protection key of the page (see Section 4.6.2); ignored otherwise
63 (XD)
If IA32_EFER.NXE = 1, execute-disable (if 1, instruction fetches are not allowed from the 4-KByte page controlled by
this entry; see Section 4.6); otherwise, reserved (must be 0)