13-18 Vol. 1
MANAGING STATE USING THE XSAVE FEATURE SET
Depending on details of the operating system, an execution of XSAVEOPT by a user application might use the
modified optimization when the most recent execution of XRSTOR was by a different application. Because of
this, Intel recommends the application software not use the XSAVEOPT instruction.
The MXCSR register and MXCSR_MASK are part of SSE state (see Section 13.5.2) and are thus associated with
bit 1 of RFBM. However, the XSAVEOPT instruction also saves these values when RFBM[2] = 1 (even if RFBM[1] =
0). The init and modified optimizations do not apply to the MXCSR register and MXCSR_MASK.
13.10 OPERATION OF XSAVEC
The operation of XSAVEC is similar to that of XSAVE. Two main differences are (1) XSAVEC uses the compacted
format for the extended region of the XSAVE area; and (2) XSAVEC uses the init optimization (see Section 13.6).
Unlike XSAVEOPT, XSAVEC does not use the modified optimization. See Section 13.2 for details of how to determine
whether XSAVEC is supported.
The XSAVEC instruction takes a single memory operand, which is an XSAVE area. In addition, the register pair
EDX:EAX is an implicit operand used as a state-component bitmap (see Section 13.1) called the instruction
mask. The logical (bitwise) AND of XCR0 and the instruction mask is the requested-feature bitmap (RFBM) of
the user state components to be saved.
The following conditions cause execution of the XSAVEC instruction to generate a fault:
•
If the XSAVE feature set is not enabled (CR4.OSXSAVE = 0), an invalid-opcode exception (#UD) occurs.
•
If CR0.TS[bit 3] is 1, a device-not-available exception (#NM) occurs.
•
If the address of the XSAVE area is not 64-byte aligned, a general-protection exception (#GP) occurs.
1
If none of these conditions cause a fault, execution of XSAVEC writes the XSTATE_BV field of the XSAVE header
(see Section 13.4.2), setting XSTATE_BV[i] (0 ≤ i ≤ 63) as follows:
2
•
If RFBM[i] = 0, XSTATE_BV[i] is written as 0.
•
If RFBM[i] = 1, XSTATE_BV[i] is set to the value of XINUSE[i] (see below for an exception made for
XSTATE_BV[1]). Section 13.6 defines XINUSE to describe the processor init optimization and specifies the
initial configuration of each state component. The nature of that optimization implies the following:
— If state component i is in its initial configuration, XSTATE_BV[i] may be written with either 0 or 1.
— If state component i is not in its initial configuration, XSTATE_BV[i] is written with 1.
XINUSE[1] pertains only to the state of the XMM registers and not to MXCSR. However, if RFBM[1] = 1 and
MXCSR does not have the value 1F80H, XSAVEC writes XSTATE_BV[1] as 1 even if XINUSE[1] = 0.
(As explained in Section 13.6, the initial configurations of some state components may depend on whether the
processor is in 64-bit mode.)
The XSAVEC instructions sets bit 63 of the XCOMP_BV field of the XSAVE header while writing RFBM[62:0] to
XCOMP_BV[62:0]. The XSAVEC instruction does not write any part of the XSAVE header other than the XSTATE_BV
and XCOMP_BV fields.
Execution of XSAVEC saves into the XSAVE area those state components corresponding to bits that are set in RFBM
(subject to the init optimization described below). State components 0 and 1 are located in the legacy region of the
XSAVE area (see Section 13.4.1). Each state component i, 2 ≤ i ≤ 62, is located in the extended region; the XSAVEC
instruction always uses the compacted format for the extended region (see Section 13.4.3).
See Section 13.5 for specifics for each state component and for details regarding mode-specific operation and
operation determined by instruction prefixes. See Section 13.13 for details regarding faults caused by memory
accesses.
Execution of XSAVEC performs the init optimization to reduce the amount of data written to memory. If
XINUSE[i] = 0, state component i is not saved to the XSAVE area (even if RFBM[i] = 1). However, if RFBM[1] = 1
and MXCSR does not have the value 1F80H, XSAVEC writes saves all of state component 1 (SSE — including the
1. If CR0.AM = 1, CPL = 3, and EFLAGS.AC =1, an alignment-check exception (#AC) may occur instead of #GP.
2. Unlike the XSAVE and XSAVEOPT instructions, the XSAVEC instruction does not read the XSTATE_BV field of the XSAVE header.