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Vol. 1 13-5

MANAGING STATE USING THE XSAVE FEATURE SET

XCR0[4:3] have value 00b coming out of RESET. As noted in Section 13.2, a processor allows software to set 
XCR0[4:3] to 11b if and only if CPUID.(EAX=0DH,ECX=0):EAX[4:3] = 11b. In addition, executing the XSETBV 
instruction causes a general-protection fault (#GP) if ECX = 0, EAX[4:3] is neither 00b nor 11b; that is, 
software can enable the XSAVE feature set for MPX state only if it does so for both state components.
As noted in Section 13.1, the processor will preserve MPX state unmodified if software clears XCR0[4:3].

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XCR0[7:5] are associated with AVX-512 state (see Section 13.5.5). Software can use the XSAVE feature set to 
manage AVX-512 state only if XCR0[7:5] = 111b. In addition, software can execute AVX-512 instructions only 
if CR4.OSXSAVE = 1 and XCR0[7:5] = 111b. Otherwise, any execution of an AVX-512 instruction causes an 
invalid-opcode exception (#UD).
XCR0[7:5] have value 000b coming out of RESET. As noted in Section 13.2, a processor allows software to set 
XCR0[7:5] to 111b if and only if CPUID.(EAX=0DH,ECX=0):EAX[7:5] = 111b. In addition, executing the 
XSETBV instruction causes a general-protection fault (#GP) if ECX = 0, EAX[7:5] is not 000b, and any bit is 
clear in EAX[2:1] or EAX[7:5]; that is, software can enable the XSAVE feature set for AVX-512 state only if it 
does so for all three state components, and only if it also does so for AVX state and SSE state. This implies that 
the value of XCR0[7:5] is always either 000b or 111b.
As noted in Section 13.1, the processor will preserve AVX-512 state unmodified if software clears XCR0[7:5]. 
However, clearing XCR0[7:5] while AVX-512 state is not in its initial configuration may cause SSE and AVX 
instructions to incur a power and performance penalty. See Section 13.5.3, “Enable the Use Of XSAVE Feature 
Set And XSAVE State Components” of Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 
3A
, for how system software can avoid this penalty.

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XCR0[9] is associated with PKRU state (see Section 13.5.7). Software can use the XSAVE feature set to 
manage PKRU state only if XCR0[9] = 1. The value of XCR0[9] in no way determines whether software can use 
protection keys or execute other instructions that access PKRU state (these instructions can be executed even 
if XCR0[9] = 0).
XCR0[9] is 0 coming out of RESET. As noted in Section 13.2, a processor allows software to set XCR0[9] if and 
only if CPUID.(EAX=0DH,ECX=0):EAX[9] = 1.

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XCR0[63:10] and XCR0[8] are reserved.

1

 Executing the XSETBV instruction causes a general-protection fault 

(#GP) if ECX = 0 and any corresponding bit in EDX:EAX is not 0. These bits in XCR0 are all 0 coming out of 
RESET.

Software operating with CPL > 0 may need to determine whether the XSAVE feature set and certain XSAVE-
enabled features have been enabled. If CPL > 0, execution of the MOV from CR4 instruction causes a general-
protection fault (#GP). The following alternative mechanisms allow software to discover the enabling of the XSAVE 
feature set regardless of CPL:

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The value of CR4.OSXSAVE is returned in CPUID.1:ECX.OSXSAVE[bit 27]. If software determines that 
CPUID.1:ECX.OSXSAVE = 1, the processor supports the XSAVE feature set and the feature set has been 
enabled in CR4.

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Executing the XGETBV instruction with ECX = 0 returns the value of XCR0 in EDX:EAX. XGETBV can be 
executed if CR4.OSXSAVE = 1 (if CPUID.1:ECX.OSXSAVE = 1), regardless of CPL.

Thus, software can use the following algorithm to determine the support and enabling for the XSAVE feature set:
1. Use CPUID to discover the value of CPUID.1:ECX.OSXSAVE.

— If the bit is 0, either the XSAVE feature set is not supported by the processor or has not been enabled by 

software. Either way, the XSAVE feature set is not available, nor are XSAVE-enabled features such as AVX.

— If the bit is 1, the processor supports the XSAVE feature set — including the XGETBV instruction — and it 

has been enabled by software. The XSAVE feature set can be used to manage x87 state (because XCR0[0] 
is always 1). Software requiring more detailed information can go on to the next step.

2. Execute XGETBV with ECX = 0 to discover the value of XCR0. If XCR0[1] = 1, the XSAVE feature set can be 

used to manage SSE state. If XCR0[2] = 1, the XSAVE feature set can be used to manage AVX state and 
software can execute AVX instructions. If XCR0[4:3] is 11b, the XSAVE feature set can be used to manage MPX 

1. If XCR0[3] = 0, executions of CALL, RET, JMP, and Jcc do not initialize the bounds registers.
1. Bit 8 corresponds to a supervisor state component. Since bits can be set in XCR0 only for user state components, that bit of XCR0 

must be 0.