24-14 Vol. 3C

VIRTUAL MACHINE CONTROL STRUCTURES

— EOI_EXIT0 contains bits for vectors from 0 (bit 0) to 63 (bit 63).
— EOI_EXIT1 contains bits for vectors from 64 (bit 0) to 127 (bit 63).
— EOI_EXIT2 contains bits for vectors from 128 (bit 0) to 191 (bit 63).
— EOI_EXIT3 contains bits for vectors from 192 (bit 0) to 255 (bit 63).
See Section 29.1.4 for more information on the use of this field.

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Posted-interrupt notification vector (16 bits). This field is supported only on processors that support the 1-
setting of the “process posted interrupts” VM-execution control. Its low 8 bits contain the interrupt vector that 
is used to notify a logical processor that virtual interrupts have been posted. See Section 29.6 for more 
information on the use of this field.

•

Posted-interrupt descriptor address (64 bits). This field is supported only on processors that support the 
1-setting of the “process posted interrupts” VM-execution control. It is the physical address of a 64-byte 
aligned posted interrupt descriptor. See Section 29.6 for more information on the use of this field.

24.6.9 MSR-Bitmap 

Address

On processors that support the 1-setting of the “use MSR bitmaps” VM-execution control, the VM-execution control 
fields include the 64-bit physical address of four contiguous MSR bitmaps, which are each 1-KByte in size. This 
field does not exist on processors that do not support the 1-setting of that control. The four bitmaps are:

•

Read bitmap for low MSRs (located at the MSR-bitmap address). This contains one bit for each MSR address 
in the range 00000000H to 00001FFFH. The bit determines whether an execution of RDMSR applied to that 
MSR causes a VM exit.

•

Read bitmap for high MSRs (located at the MSR-bitmap address plus 1024). This contains one bit for each 
MSR address in the range C0000000H toC0001FFFH. The bit determines whether an execution of RDMSR 
applied to that MSR causes a VM exit.

•

Write bitmap for low MSRs (located at the MSR-bitmap address plus 2048). This contains one bit for each 
MSR address in the range 00000000H to 00001FFFH. The bit determines whether an execution of WRMSR 
applied to that MSR causes a VM exit.

•

Write bitmap for high MSRs (located at the MSR-bitmap address plus 3072). This contains one bit for each 
MSR address in the range C0000000H toC0001FFFH. The bit determines whether an execution of WRMSR 
applied to that MSR causes a VM exit.

A logical processor uses these bitmaps if and only if the “use MSR bitmaps” control is 1. If the bitmaps are used, an 
execution of RDMSR or WRMSR causes a VM exit if the value of RCX is in neither of the ranges covered by the 
bitmaps or if the appropriate bit in the MSR bitmaps (corresponding to the instruction and the RCX value) is 1. See 
Section 25.1.3 for details. If the bitmaps are used, their address must be 4-KByte aligned.

24.6.10 Executive-VMCS 

Pointer

The executive-VMCS pointer is a 64-bit field used in the dual-monitor treatment of system-management interrupts 
(SMIs) and system-management mode (SMM). SMM VM exits save this field as described in Section 34.15.2. 
VM entries that return from SMM use this field as described in Section 34.15.4.