Vol. 1 13-17

MANAGING STATE USING THE XSAVE FEATURE SET

The following conditions cause execution of the XSAVEOPT instruction to generate a fault:

•

If the XSAVE feature set is not enabled (CR4.OSXSAVE = 0), an invalid-opcode exception (#UD) occurs.

•

If CR0.TS[bit 3] is 1, a device-not-available exception (#NM) occurs.

•

If the address of the XSAVE area is not 64-byte aligned, a general-protection exception (#GP) occurs.

1

If none of these conditions cause a fault, execution of XSAVEOPT reads the XSTATE_BV field of the XSAVE header 
(see Section 13.4.2) and writes it back to memory, setting XSTATE_BV[i] (0 ≤ i ≤ 63) as follows:

•

If RFBM[i] =  0,  XSTATE_BV[i] is not changed.

•

If RFBM[i] =  1,  XSTATE_BV[i] is set to the value of XINUSE[i]. Section 13.6 defines XINUSE to describe the 
processor init optimization and specifies the initial configuration of each state component. The nature of that 
optimization implies the following:
— If the state component is in its initial configuration, XINUSE[i] may be either 0 or 1, and XSTATE_BV[i] may 

be written with either 0 or 1.
XINUSE[1] pertains only to the state of the XMM registers and not to MXCSR. Thus, XSTATE_BV[1] may be 
written with 0 even if MXCSR does not have its RESET value of 1F80H.

— If the state component is not in its initial configuration, XSTATE_BV[i] is written with 1.
(As explained in Section 13.6, the initial configurations of some state components may depend on whether the 
processor is in 64-bit mode.)

The XSAVEOPT instruction does not write any part of the XSAVE header other than the XSTATE_BV field; in partic-
ular, it does not write to the XCOMP_BV field.
Execution of XSAVEOPT saves into the XSAVE area those state components corresponding to bits that are set in 
RFBM (subject to the optimizations described below). State components 0 and 1 are located in the legacy region of 
the XSAVE area (see Section 13.4.1). Each state component i, 2 ≤ i ≤ 62, is located in the extended region; the 

XSAVEOPT instruction always uses the standard format for the extended region (see Section 13.4.3).
See Section 13.5 for specifics for each state component and for details regarding mode-specific operation and 
operation determined by instruction prefixes. See Section 13.13 for details regarding faults caused by memory 
accesses.
Execution of XSAVEOPT performs two optimizations that reduce the amount of data written to memory:

•

Init optimization.
If XINUSE[i] = 0, state component i is not saved to the XSAVE area (even if RFBM[i] = 1). (See below for 
exceptions made for MXCSR.)

•

Modified optimization.
Each execution of XRSTOR and XRSTORS establishes XRSTOR_INFO as a 4-tuple 



w,x,y,z



 (see Section 13.8.3 

and Section 13.12). Execution of XSAVEOPT uses the modified optimization only if the following all hold for the 
current value of XRSTOR_INFO:
— w = CPL;
— x = 1 if and only if the logical processor is in VMX non-root operation;
— y is the linear address of the XSAVE area being used by XSAVEOPT; and
— z is 00000000_00000000H. (This last item implies that XSAVEOPT does not use the modified optimization 

if the last execution of XRSTOR used the compacted form, or if an execution of XRSTORS followed the last 
execution of XRSTOR.)

If XSAVEOPT uses the modified optimization and XMODIFIED[i] = 0 (see Section 13.6), state component i is 
not saved to the XSAVE area.
(In practice, the benefit of the modified optimization for state component i depends on how the processor is 
tracking state component i; see Section 13.6. Limitations on the tracking ability may result in state component 
i being saved even though is in the same configuration that was loaded by the previous execution of XRSTOR.)

1. If CR0.AM = 1, CPL = 3, and EFLAGS.AC =1, an alignment-check exception (#AC) may occur instead of #GP.