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4-22 Vol. 1

DATA TYPES

How the processor handles an underflow condition, depends on two related conditions:

creation of a tiny, non-zero result

creation of an inexact result; that is, a result that cannot be represented exactly in the destination format

Which of these events causes an underflow exception to be reported and how the processor responds to the excep-
tion condition depends on whether the underflow exception is masked:

Underflow exception masked — The underflow exception is reported (the UE flag is set) only when the result 
is both tiny and inexact. The processor returns a correctly signed result whose magnitude is less than or equal 
to the smallest positive normal floating-point number to the destination operand, regardless of inexactness.

Underflow exception not masked — The underflow exception is reported when the result is non-zero tiny, 
regardless of inexactness. The processor leaves the source and destination operands unaltered or stores a 
biased result in the destination operand (depending whether the underflow exception was generated during an 
SSE/SSE2/SSE3 floating-point operation or an x87 FPU operation) and invokes a software exception handler.

See the following sections for information regarding the numeric underflow exception when detected while 
executing x87 FPU instructions or while executing SSE/SSE2/SSE3 instructions:

x87 FPU; Section 8.5.5, “Numeric Underflow Exception (#U)”

SIMD floating-point exceptions; Section 11.5.2.5, “Numeric Underflow Exception (#U)”

4.9.1.6  

Inexact-Result (Precision) Exception (#P)

The inexact-result exception (also called the precision exception) occurs if the result of an operation is not exactly 
representable in the destination format. For example, the fraction 1/3 cannot be precisely represented in binary 
floating-point form. This exception occurs frequently and indicates that some (normally acceptable) accuracy will 
be lost due to rounding. The exception is supported for applications that need to perform exact arithmetic only. 
Because the rounded result is generally satisfactory for most applications, this exception is commonly masked.
If the inexact-result exception is masked when an inexact-result condition occurs and a numeric overflow or under-
flow condition has not occurred, the processor sets the PE flag and stores the rounded result in the destination 
operand. The current rounding mode determines the method used to round the result. See Section 4.8.4, 
“Rounding.”
If the inexact-result exception is not masked when an inexact result occurs and numeric overflow or underflow has 
not occurred, the PE flag is set, the rounded result is stored in the destination operand, and a software exception 
handler is invoked.
If an inexact result occurs in conjunction with numeric overflow or underflow, one of the following operations is 
carried out:

If an inexact result occurs along with masked overflow or underflow, the OE flag or UE flag and the PE flag are 
set and the result is stored as described for the overflow or underflow exceptions; see Section 4.9.1.4, 
“Numeric Overflow Exception (#O),” or S
ection 4.9.1.5, “Numeric Underflow Exception (#U).” If the inexact 
result exception is unmasked, the processor also invokes a software exception handler.

If an inexact result occurs along with unmasked overflow or underflow and the destination operand is a register, 
the OE or UE flag and the PE flag are set, the result is stored as described for the overflow or underflow 
exceptions, and a software exception handler is invoked.

If an unmasked numeric overflow or underflow exception occurs and the destination operand is a memory location 
(which can happen only for a floating-point store), the inexact-result condition is not reported and the C1 flag is 
cleared.
See the following sections for information regarding the inexact-result exception when detected while executing 
x87 FPU or SSE/SSE2/SSE3 instructions:

x87 FPU; Section 8.5.6, “Inexact-Result (Precision) Exception (#P)”

SIMD floating-point exceptions; Section 11.5.2.3, “Divide-By-Zero Exception (#Z)”