19-202 Vol. 3B

PERFORMANCE-MONITORING EVENTS

19.16  PERFORMANCE MONITORING EVENTS FOR INTEL

®

 PENTIUM

®

 M 

PROCESSORS

The Pentium M processor’s performance-monitoring events are based on monitoring events for the P6 family of 
processors. All of these performance events are model specific for the Pentium M processor and are not available in 
this form in other processors. Table 19-35 lists the Performance-Monitoring events that were added in the Pentium 
M processor.

2: NONBOGUS2

TS

3: NONBOGUS3

TS

4: BOGUS0

TS

5: BOGUS1

TS

6: BOGUS2

TS

7: BOGUS3

TS

At Retirement

x87_assist

Bit
0: FPSU

TS

1: FPSO

TS

2: POAO

TS

3: POAU

TS

4: PREA

TS

At Retirement

branch_retired

Bit
0: MMNP

TS

1: MMNM

TS

2: MMTP

TS

3: MMTM

TS

At Retirement

mispred_branch_retired

Bit 0: NBOGUS

TS

At Retirement

uops_retired

Bit
0: NBOGUS

TS

1: BOGUS

TS

At Retirement

instr_completed

Bit
0: NBOGUS

TS

1: BOGUS

TS

Table 19-34.  Event Mask Qualification for Logical Processors (Contd.)

Event Type

Event Name

Event Masks, ESCR[24:9]

TS or TI