Vol. 3B 19-203
PERFORMANCE-MONITORING EVENTS
Table 19-35. Performance Monitoring Events on Intel
®
Pentium
®
M Processors
Name
Hex Values
Descriptions
Power Management
EMON_EST_TRANS
58H
Number of Enhanced Intel SpeedStep technology transitions:
Mask = 00H - All transitions
Mask = 02H - Only Frequency transitions
EMON_THERMAL_TRIP
59H
Duration/Occurrences in thermal trip; to count number of thermal trips: bit
22 in PerfEvtSel0/1 needs to be set to enable edge detect.
BPU
BR_INST_EXEC
88H
Branch instructions that were executed (not necessarily retired).
BR_MISSP_EXEC
89H
Branch instructions executed that were mispredicted at execution.
BR_BAC_MISSP_EXEC
8AH
Branch instructions executed that were mispredicted at front end (BAC).
BR_CND_EXEC
8BH
Conditional branch instructions that were executed.
BR_CND_MISSP_EXEC
8CH
Conditional branch instructions executed that were mispredicted.
BR_IND_EXEC
8DH
Indirect branch instructions executed.
BR_IND_MISSP_EXEC
8EH
Indirect branch instructions executed that were mispredicted.
BR_RET_EXEC
8FH
Return branch instructions executed.
BR_RET_MISSP_EXEC
90H
Return branch instructions executed that were mispredicted at execution.
BR_RET_BAC_MISSP_EXEC
91H
Return branch instructions executed that were mispredicted at front end
(BAC).
BR_CALL_EXEC
92H
CALL instruction executed.
BR_CALL_MISSP_EXEC 93H
CALL
instruction executed and miss predicted.
BR_IND_CALL_EXEC
94H
Indirect CALL instructions executed.
Decoder
EMON_SIMD_INSTR_RETIRED
CEH
Number of retired MMX instructions.
EMON_SYNCH_UOPS
D3H
Sync micro-ops
EMON_ESP_UOPS
D7H
Total number of micro-ops
EMON_FUSED_UOPS_RET
DAH
Number of retired fused micro-ops:
Mask = 0 - Fused micro-ops
Mask = 1 - Only load+Op micro-ops
Mask = 2 - Only std+sta micro-ops
EMON_UNFUSION
DBH
Number of unfusion events in the ROB, happened on a FP exception to a
fused µop.
Prefetcher
EMON_PREF_RQSTS_UP
F0H
Number of upward prefetches issued.
EMON_PREF_RQSTS_DN
F8H
Number of downward prefetches issued.