19-2 Vol. 3B

PERFORMANCE-MONITORING EVENTS

19.1 ARCHITECTURAL 

PERFORMANCE-MONITORING 

EVENTS

Architectural performance events are introduced in Intel Core Solo and Intel Core Duo processors. They are also 
supported on processors based on Intel Core microarchitecture. Table 19-1 lists pre-defined architectural perfor-
mance events that can be configured using general-purpose performance counters and associated event-select 
registers.

Fixed-function performance counters count only events defined in Table 19-2.

Table 19-1.  Architectural Performance Events

Event

Num.

Event Mask Mnemonic

Umask

Value

Description

Comment

3CH

UnHalted Core Cycles

00H

Unhalted core cycles.

3CH

UnHalted Reference Cycles

01H

Unhalted reference cycles.

Measures bus 

cycle

1

NOTES:

1. Implementation of this event in Intel Core 2 processor family, Intel Core Duo, and Intel Core Solo processors measures bus clocks.

C0H

Instruction Retired

00H

Instruction retired.

2EH

LLC Reference

4FH

Longest latency cache references.

2EH

LLC Misses

41H

Longest latency cache misses.

C4H

Branch Instruction Retired

00H

Branch instruction at retirement.

C5H

Branch Misses Retired

00H

Mispredicted branch instruction at retirement.

Table 19-2.  Fixed-Function Performance Counter and Pre-defined Performance Events

Fixed-Function Performance 

Counter

Address Event Mask Mnemonic

Description

IA32_PERF_FIXED_CTR0

309H

Inst_Retired.Any

This event counts the number of instructions that retire 

execution. For instructions that consist of multiple micro-

ops, this event counts the retirement of the last micro-op 

of the instruction. The counter continues counting during 

hardware interrupts, traps, and inside interrupt handlers.

IA32_PERF_FIXED_CTR1

30AH

CPU_CLK_UNHALTED.THRE

AD/CPU_CLK_UNHALTED.C

ORE/CPU_CLK_UNHALTED.

THREAD_ANY

The CPU_CLK_UNHALTED.THREAD event counts the 

number of core cycles while the logical processor is not in a 

halt state. 
If there is only one logical processor in a processor core, 

CPU_CLK_UNHALTED.CORE counts the unhalted cycles of 

the processor core. 
If there are more than one logical processor in a processor 

core, CPU_CLK_UNHALTED.THREAD_ANY is supported by 

programming IA32_FIXED_CTR_CTRL[bit 6]AnyThread = 1.
The core frequency may change from time to time due to 

transitions associated with Enhanced Intel SpeedStep 

Technology or TM2. For this reason this event may have a 

changing ratio with regards to time.