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18-114 Vol. 3B

PERFORMANCE MONITORING

18.21.4  FSB Event Interface

The layout of MSR_EMON_L3_CTR_CTL4 through MSR_EMON_L3_CTR_CTL7 is given in Figure 18-59. Counting 
starts after software writes a non-zero value to one or more of the upper 32 bits. 
The event mask field (bits 58:32) is organized as follows:

Bit 58: must set to 1.

FSB_Submask (bits 57:32): Specifies FSB-specific sub-event mask.

The FSB sub-event mask defines a set of independent attributes. The event logic signals to increment the associ-
ated event count field if one of the attribute matches. Some of the sub-event mask bit counts durations. A duration 
event increments at most once per cycle.

18.21.4.1   FSB Sub-Event Mask Interface

FSB_type (bit 37:32): Specifies different FSB transaction types originated from this physical package

FSB_L_clear (bit 38): Count clean snoop results from any source for transaction originated from this physical 
package

FSB_L_hit (bit 39): Count HIT snoop results from any source for transaction originated from this physical 
package

Figure 18-58.  MSR_EMON_L3_CTR_CTL2/3, Addresses: 107CEH/107CFH

Figure 18-59.  MSR_EMON_L3_CTR_CTL4/5/6/7, Addresses: 107D0H-107D3H

L2_state

46

38

44

37 36

43

54

Saturate

Snoop_match
Type_match

Reserved

63

56 55

47

32

57

58

59

60

53

39

Agent_match

MSR_EMON_L3_CTR_CTL2/3, Addresses: 107CEH/107CFH

Block_snoop
Core_select

32 bit event count

0

31

1

49

38

50

37 36

33

34

Saturate

FSB submask

Reserved

63

56 55

48

32

57

58

59

60

35

39

MSR_EMON_L3_CTR_CTL4/5/6/7, Addresses: 107D0H-107D3H

32 bit event count

0

31