18-112 Vol. 3B

PERFORMANCE MONITORING

18.21.2  GBSQ Event Interface

The layout of MSR_EMON_L3_CTR_CTL0 and MSR_EMON_L3_CTR_CTL1 is given in Figure 18-57. Counting starts 
after software writes a non-zero value to one or more of the upper 32 bits. 
The event mask field (bits 58:32) consists of the following eight attributes:

•

Agent_Select (bits 35:32): The definition of this field differs slightly between Intel Xeon processor 7100 and 
7400. 
For Intel Xeon processor 7100 series, each bit specifies a logical processor in the physical package. The lower 
two bits corresponds to two logical processors in the first processor core, the upper two bits corresponds to two 
logical processors in the second processor core. 0FH encoding matches transactions from any logical processor.
For Intel Xeon processor 7400 series, each bit of [34:32] specifies the SDI logic of a dual-core module as the 
originator of the transaction. A value of 0111B in bits [35:32] specifies transaction from any processor core.

•

Data_Flow (bits 37:36): Bit 36 specifies demand transactions, bit 37 specifies prefetch transactions.

•

Type_Match (bits 43:38): Specifies transaction types. If all six bits are set, event count will include all 
transaction types.

•

Snoop_Match: (bits 46:44): The three bits specify (in ascending bit position) clean snoop result, HIT snoop 
result, and HITM snoop results respectively.

•

L3_State (bits 53:47): Each bit specifies an L2 coherency state. 

•

Core_Module_Select (bits 55:54): The valid encodings for L3 lookup differ slightly between Intel Xeon 
processor 7100 and 7400. 
For Intel Xeon processor 7100 series, 
— 00B: Match transactions from any core in the physical package
— 01B: Match transactions from this core only
— 10B: Match transactions from the other core in the physical package
— 11B: Match transaction from both cores in the physical package
For Intel Xeon processor 7400 series, 
— 00B: Match transactions from any dual-core module in the physical package
— 01B: Match transactions from this dual-core module only
— 10B: Match transactions from either one of the other two dual-core modules in the physical package

Figure 18-57.  MSR_EMON_L3_CTR_CTL0/1, Addresses: 107CCH/107CDH

Core_module_select

44

38

43

37 36

54 53

Saturate
Cross_snoop
Fill_eviction

Snoop_match
Type_match
Data_flow
Agent_select

Reserved

63

56 55

46

32

47

57

58

59

60

35

32 bit event count

0

31

MSR_EMON_L3_CTR_CTL0/1, Addresses: 107CCH/107CDH

L3_state