Vol. 3B 14-9
POWER AND THERMAL MANAGEMENT
rate of performance increase /decrease and the result of the hardware's energy efficiency and performance
optimizations. The default value of this field is 80H. Note: If CPUID.06H:EAX[bit 10] indicates that this field is
not supported, HWP uses the value of the IA32_ENERGY_PERF_BIAS MSR to determine the energy efficiency /
performance preference.
•
Activity_Window (bits 41:32, RW) — Conveys a hint to the HWP hardware specifying a moving workload
history observation window for performance/frequency optimizations. If 0, the hardware will determine the
appropriate window size. When writing a non-zero value to this field, this field is encoded in the format of bits
38:32 as a 7-bit mantissa and bits 41:39 as a 3-bit exponent value in powers of 10. The resultant value is in
microseconds. Thus, the minimal/maximum activity window size is 1 microsecond/1270 seconds. Combined
with the Energy_Performance_Preference input, Activity_Window influences the rate of performance increase
/ decrease. This non-zero hint only has meaning when Desired_Performance = 0. The default value of this field
is 0.
•
Package_Control (bit 42, RW) — When set causes this logical processor's IA32_HWP_REQUEST control
inputs to be derived from IA32_HWP_REQUEST_PKG
•
Bits 63:43 are reserved and must be zero.
The HWP hardware clips and resolves the field values as necessary to the valid range. Reads return the last value
written not the clipped values.
Processors may support a subset of IA32_HWP_REQUEST fields as indicated by CPUID. Reads of non-supported
fields will return 0. Writes to non-supported fields are ignored.
The OS may override HWP's autonomous selection of performance state with a specific performance target by
setting the Desired_Performance field to a non zero value, however, the effective frequency delivered is subject to
the result of energy efficiency and performance optimizations, which are influenced by the Energy Performance
Preference field.
Software may disable all hardware optimizations by setting Minimum_Performance = Maximum_Performance
(subject to package coordination).
Note: The processor may run below the Minimum_Performance level due to hardware constraints including: power,
thermal, and package coordination constraints. The processor may also run below the Minimum_Performance level
for short durations (few milliseconds) following C-state exit, and when Hardware Duty Cycling (see Section 14.5)
is enabled.
The structure of the IA32_HWP_REQUEST_PKG MSR (package-level) is identical to the IA32_HWP_REQUEST MSR
with the exception of the Package Control field, which does not exist. Field values written to this MSR apply to all
logical processors within the physical package with the exception of logical processors whose
IA32_HWP_REQUEST.Package Control field is clear (zero). Single P-state Control mode is only supported when
IA32_HWP_REQUEST_PKG is not supported.
14.4.5 HWP
Feedback
The processor provides several types of feedback to the OS during HWP operation.
Figure 14-7. IA32_HWP_REQUEST_PKG Register
0
Reserved
24
7
8
15
16
23
31
32
Energy_Performance_Preference
Desired_Performance
Maximum_Performance
Activity_Window
Minimum_Performance
63
42 41