14-8 Vol. 3B

POWER AND THERMAL MANAGEMENT

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Lowest_Performance (bits 31:24, RO) — Value for the lowest performance level that software can program 
to IA32_HWP_REQUEST.

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Bits 63:32 are reserved and must be zero.

The value returned in the Guaranteed_Performance field is hardware's best-effort approximation of the avail-
able performance given current operating constraints. Changes to the Guaranteed_Performance value will 
primarily occur due to a shift in operational mode. This includes a power or other limit applied by an external agent, 
e.g. RAPL (see Figure 14.9.1), or the setting of a Configurable TDP level (see model-specific controls related to 
Programmable TDP Limit in Chapter 35, “Model-Specific Registers (MSRs)”). Notification of a change to the 
Guaranteed_Performance occurs via interrupt (if configured) and the IA32_HWP_Status MSR. Changes to 
Guaranteed_Performance are indicated when a macroscopically meaningful change in performance occurs i.e. 
sustained for greater than one second. Consequently, notification of a change in Guaranteed Performance will typi-
cally occur no more frequently than once per second. Rapid changes in platform configuration, e.g. docking / 
undocking, with corresponding changes to a Configurable TDP level could potentially cause more frequent notifica-
tions.
The value returned by the Most_Efficient_Performance field provides the OS with an indication of the practical 
lower limit for the IA32_HWP_REQUEST. The processor may not honor IA32_HWP_REQUEST.Maximum Perfor-
mance settings below this value.

14.4.4 Managing 

HWP 

Typically, the OS controls HWP operation for each logical processor via the writing of control hints / constraints to 
the IA32_HWP_REQUEST MSR. The layout of the IA32_HWP_REQUEST MSR is shown in Figure 14-6. The bit fields 
are described below: 

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Minimum_Performance (bits 7:0, RW) — Conveys a hint to the HWP hardware. The OS programs the 
minimum performance hint to achieve the required quality of service (QOS) or to meet a service level 
agreement (SLA) as needed. Note that an excursion below the level specified is possible due to hardware 
constraints. The default value of this field is IA32_HWP_CAPABILITIES.Lowest_Performance.

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Maximum_Performance (bits 15:8, RW) — Conveys a hint to the HWP hardware. The OS programs this 
field to limit the maximum performance that is expected to be supplied by the HWP hardware. Excursions 
above the limit requested by OS are possible due to hardware coordination between the processor cores and 
other components in the package. The default value of this field is 
IA32_HWP_CAPABILITIES.Highest_Performance.

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Desired_Performance (bits 23:16, RW) — Conveys a hint to the HWP hardware. When set to zero, 
hardware autonomous selection determines the performance target. When set to a non-zero value (between 
the range of Lowest_Performance and Highest_Performance of IA32_HWP_CAPABILITIES) conveys an explicit 
performance request hint to the hardware; effectively disabling HW Autonomous selection. The 
Desired_Performance input is non-constraining in terms of Performance and Energy Efficiency optimizations, 
which are independently controlled. The default value of this field is 0.

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Energy_Performance_Preference (bits 31:24, RW) — Conveys a hint to the HWP hardware. The OS may 
write a range of values from 0 (performance preference) to 0FFH (energy efficiency preference) to influence the 

Figure 14-6.  IA32_HWP_REQUEST Register 

43

0

Reserved

24

7

8

15

16

23

31

32

Energy_Performance_Preference
Desired_Performance
Maximum_Performance

Activity_Window

Minimum_Performance

Package_Control

63

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