B-6 Vol. 3D
FIELD ENCODING IN VMCS
B.3 32-BIT
FIELDS
A value of 2 in bits 14:13 of an encoding indicates a 32-bit field. As noted in Section 24.11.2, each 32-bit field
allows only full access, meaning that bit 0 of its encoding is 0. Each such encoding is thus an even number.
B.3.1
32-Bit Control Fields
A value of 0 in bits 11:10 of an encoding indicates a control field. These fields are distinguished by their index value
in bits 9:1. Table B-8 enumerates the 32-bit control fields.
3. This field exists only on processors that support the 1-setting of the "load IA32_PERF_GLOBAL_CTRL" VM-exit control.
Table B-8. Encodings for 32-Bit Control Fields (0100_00xx_xxxx_xxx0B)
Field Name
Index
Encoding
Pin-based VM-execution controls
000000000B
00004000H
Primary processor-based VM-execution controls
000000001B
00004002H
Exception bitmap
000000010B
00004004H
Page-fault error-code mask
000000011B
00004006H
Page-fault error-code match
000000100B
00004008H
CR3-target count
000000101B
0000400AH
VM-exit controls
000000110B
0000400CH
VM-exit MSR-store count
000000111B
0000400EH
VM-exit MSR-load count
000001000B
00004010H
VM-entry controls
000001001B
00004012H
VM-entry MSR-load count
000001010B
00004014H
VM-entry interruption-information field
000001011B
00004016H
VM-entry exception error code
000001100B
00004018H
VM-entry instruction length
000001101B
0000401AH
TPR threshold
1
NOTES:
1. This field exists only on processors that support the 1-setting of the “use TPR shadow” VM-execution control.
000001110B
0000401CH
Secondary processor-based VM-execution controls
2
2. This field exists only on processors that support the 1-setting of the “activate secondary controls” VM-execution control.
000001111b
0000401EH
PLE_Gap
3
3. This field exists only on processors that support the 1-setting of the “PAUSE-loop exiting” VM-execution control.
000010000b
00004020H
PLE_Window
000010001b
00004022H