36-66 Vol. 3C
INTEL® PROCESSOR TRACE
2b
WRMSR/XRSTORS/RSM that changes
TraceEn 0 -> 1, with PacketByteCnt =0
0
0
D.C.
*TSC if TSCEn=1;
*TMA if TSCEn=MTCEn=1
PSB, PSBEND (see Sec-
2d
WRMSR/XRSTORS/RSM that changes
TraceEn 0 -> 1, with PacketByteCnt >0
0
1
1
TSC if TSCEn=1;
TMA if TSCEn=MTCEn=1
TSC?, TMA?, CBR,
MODE.Exec, TIP.PGE(NLIP)
2e
WRMSR/XRSTORS/RSM that changes
TraceEn 0 -> 1, with PacketByteCnt =0
0
1
1
MODE.Exec,
TIP.PGE(NLIP), PSB,
PSBEND (see Section
3a
WRMSR that changes TraceEn 1 -> 0
0
0
D.C.
None
3b
WRMSR that changes TraceEn 1 -> 0
1
0
D.C.
FUP(CLIP), TIP.PGD()
5a
MOV to CR3
0
0
0
None
5f
MOV to CR3
0
0
1
TraceStop if executed in a
TraceStop region
PIP(NewCR3,NR?), Trace-
Stop?
5b
MOV to CR3
0
1
1
*PIP.NR=1 if not in root
operation, and “Conceal
VMX non-root operation
from Intel PT” execution
control = 0
*MODE.Exec if the mode has
changed since the last
MODE.Exec, or if no
MODE.Exec since last PSB
PIP(NewCR3, NR?),
MODE.Exec?,
TIP.PGE(NLIP)
5c
MOV to CR3
1
0
0
TIP.PGD()
5e
MOV to CR3
1
0
1
*PIP.NR=1 if not in root
operation, and “Conceal
VMX non-root operation
from Intel PT” execution
control = 0
*TraceStop if executed in a
TraceStop region
PIP(NewCR3, NR?),
TIP.PGE(NLIP), TraceStop?
5d
MOV to CR3
1
1
1
*PIP.NR=1 if not in root
operation, and “Conceal
VMX non-root operation
from Intel PT” execution
control = 0
PIP(NewCR3, NR?)
6a
Unconditional direct near jump
0
0
D.C.
None
6b
Unconditional direct near jump
1
0
1
TraceStop if BLIP is in a
TraceStop region
TIP.PGD(BLIP), TraceStop?
6c
Unconditional direct near jump
0
1
1
MODE.Exec if the mode has
changed since the last
MODE.Exec, or if no
MODE.Exec since last PSB
MODE.Exec?,
TIP.PGE(BLIP)
6d
Unconditional direct near jump
1
1
1
None
7a
Conditional taken jump or compressed
RET that does not fill up the internal
TNT buffer
0
0
D.C.
None
Table 36-50. Packet Generation under Different Enable Conditions (Contd.)
Case
Operation
PktEn
Before
PktEn
After
CntxEn
After
Other Dependencies
Packets Output