35-10 Vol. 3C
MODEL-SPECIFIC REGISTERS (MSRS)
3:1
On-Demand Clock Modulation Duty Cycle:
Specific encoded values for target duty
cycle modulation.
If CPUID.01H:EDX[22] = 1
4
On-Demand Clock Modulation Enable: Set 1
to enable modulation.
If CPUID.01H:EDX[22] = 1
63:5
Reserved.
19BH
411
IA32_THERM_INTERRUPT
Thermal Interrupt Control (R/W)
Enables and disables the generation of an
interrupt on temperature transitions
detected with the processor’s thermal
sensors and thermal monitor.
See Section 14.7.2, “Thermal Monitor.”
If CPUID.01H:EDX[22] = 1
0
High-Temperature Interrupt Enable
If CPUID.01H:EDX[22] = 1
1
Low-Temperature Interrupt Enable
If CPUID.01H:EDX[22] = 1
2
PROCHOT# Interrupt Enable
If CPUID.01H:EDX[22] = 1
3
FORCEPR# Interrupt Enable
If CPUID.01H:EDX[22] = 1
4
Critical Temperature Interrupt Enable
If CPUID.01H:EDX[22] = 1
7:5
Reserved.
14:8
Threshold #1 Value
If CPUID.01H:EDX[22] = 1
15
Threshold #1 Interrupt Enable
If CPUID.01H:EDX[22] = 1
22:16
Threshold #2 Value
If CPUID.01H:EDX[22] = 1
23
Threshold #2 Interrupt Enable
If CPUID.01H:EDX[22] = 1
24
Power Limit Notification Enable
If CPUID.06H:EAX[4] = 1
63:25
Reserved.
19CH
412
IA32_THERM_STATUS
Thermal Status Information (RO)
Contains status information about the
processor’s thermal sensor and automatic
thermal monitoring facilities.
See Section 14.7.2, “Thermal Monitor”
If CPUID.01H:EDX[22] = 1
0
Thermal Status (RO):
If CPUID.01H:EDX[22] = 1
1
Thermal Status Log (R/W):
If CPUID.01H:EDX[22] = 1
2
PROCHOT # or FORCEPR# event (RO)
If CPUID.01H:EDX[22] = 1
3
PROCHOT # or FORCEPR# log (R/WC0)
If CPUID.01H:EDX[22] = 1
4
Critical Temperature Status (RO)
If CPUID.01H:EDX[22] = 1
5
Critical Temperature Status log (R/WC0)
If CPUID.01H:EDX[22] = 1
6
Thermal Threshold #1 Status (RO)
If CPUID.01H:ECX[8] = 1
7
Thermal Threshold #1 log (R/WC0)
If CPUID.01H:ECX[8] = 1
8
Thermal Threshold #2 Status (RO)
If CPUID.01H:ECX[8] = 1
9
Thermal Threshold #2 log (R/WC0)
If CPUID.01H:ECX[8] = 1
Table 35-2. IA-32 Architectural MSRs (Contd.)
Register
Address
Architectural MSR Name and bit
fields
(Former MSR Name)
MSR/Bit Description
Comment
Hex
Decimal