32-2 Vol. 3C
VIRTUALIZATION OF SYSTEM RESOURCES
right priority with respect to other events. (If the exception bitmap was programmed to cause VM exits on debug
exceptions, the debug trap will cause a VM exit. At this point, the trap can be injected during VM entry with the
proper priority.)
There is a valid pending debug exception if the BS bit (see Table 24-4) is set, regardless of the values of RFLAGS.TF
or IA32_DEBUGCTL.BTF. The values of these bits do not impact the delivery of pending debug exceptions.
VMMs should exercise care when emulating a guest write (attempted using WRMSR) to IA32_DEBUGCTL to modify
BTF if this is occurring with RFLAGS.TF = 1 and after a MOV SS or POP SS instruction (for example: while debug
exceptions are blocked). Note the following:
•
Normally, if WRMSR clears BTF while RFLAGS.TF = 1 and with debug exceptions blocked, a single-step trap will
occur after WRMSR. A VMM emulating such an instruction should set the BS bit (see Table 24-4) in the pending
debug exceptions field before VM entry.
•
Normally, if WRMSR sets BTF while RFLAGS.TF = 1 and with debug exceptions blocked, neither a single-step
trap nor a taken-branch trap can occur after WRMSR. A VMM emulating such an instruction should clear the BS
bit (see Table 24-4) in the pending debug exceptions field before VM entry.
32.3 MEMORY
VIRTUALIZATION
VMMs must control physical memory to ensure VM isolation and to remap guest physical addresses in host physical
address space for virtualization. Memory virtualization allows the VMM to enforce control of physical memory and
yet support guest OSs’ expectation to manage memory address translation.
32.3.1
Processor Operating Modes & Memory Virtualization
Memory virtualization is required to support guest execution in various processor operating modes. This includes:
protected mode with paging, protected mode with no paging, real-mode and any other transient execution modes.
VMX allows guest operation in protected-mode with paging enabled and in virtual-8086 mode (with paging
enabled) to support guest real-mode execution. Guest execution in transient operating modes (such as in real
mode with one or more segment limits greater than 64-KByte) must be emulated by the VMM.
Since VMX operation requires processor execution in protected mode with paging (through CR0 and CR4 fixed bits),
the VMM may utilize paging structures to support memory virtualization. To support guest real-mode execution,
the VMM may establish a simple flat page table for guest linear to host physical address mapping. Memory virtual-
ization algorithms may also need to capture other guest operating conditions (such as guest performing A20M#
address masking) to map the resulting 20-bit effective guest physical addresses.
32.3.2
Guest & Host Physical Address Spaces
Memory virtualization provides guest software with contiguous guest physical address space starting zero and
extending to the maximum address supported by the guest virtual processor’s physical address width. The VMM
utilizes guest physical to host physical address mapping to locate all or portions of the guest physical address space
in host memory. The VMM is responsible for the policies and algorithms for this mapping which may take into
account the host system physical memory map and the virtualized physical memory map exposed to a guest by the
VMM. The memory virtualization algorithm needs to accommodate various guest memory uses (such as: accessing
DRAM, accessing memory-mapped registers of virtual devices or core logic functions and so forth). For example:
•
To support guest DRAM access, the VMM needs to map DRAM-backed guest physical addresses to host-DRAM
regions. The VMM also requires the guest to host memory mapping to be at page granularity.
•
Virtual devices (I/O devices or platform core logic) emulated by the VMM may claim specific regions in the guest
physical address space to locate memory-mapped registers. Guest access to these virtual registers may be
configured to cause page-fault induced VM-exits by marking these regions as always not present. The VMM
may handle these VM exits by invoking appropriate virtual device emulation code.