30-16 Vol. 3C

VMX INSTRUCTION REFERENCE

VMPTRLD—Load Pointer to Virtual-Machine Control Structure

Description

Marks the current-VMCS pointer valid and loads it with the physical address in the instruction operand. The instruc-
tion fails if its operand is not properly aligned, sets unsupported physical-address bits, or is equal to the VMXON 
pointer. In addition, the instruction fails if the 32 bits in memory referenced by the operand do not match the VMCS 
revision identifier supported by this processor.

1

The operand of this instruction is always 64 bits and is always in memory.

Operation

IF (register operand) or (not in VMX operation) or (CR0.PE = 0) or (RFLAGS.VM = 1) or (IA32_EFER.LMA = 1 and CS.L = 0)

THEN #UD;

ELSIF in VMX non-root operation

THEN VMexit;

ELSIF CPL

>

 0

THEN #GP(0);
ELSE

addr ← contents of 64-bit in-memory source operand;

IF addr is not 4KB-aligned OR
addr sets any bits beyond the physical-address width

2

THEN VMfail(VMPTRLD with invalid physical address);

ELSIF addr = VMXON pointer

THEN VMfail(VMPTRLD with VMXON pointer);
ELSE

rev ← 32 bits located at physical address addr;

IF rev[30:0] ≠ VMCS revision identifier supported by processor OR

rev[31] = 1 AND processor does not support 1-setting of “VMCS shadowing”

THEN VMfail(VMPTRLD with incorrect VMCS revision identifier);
ELSE

current-VMCS pointer ← addr;

VMsucceed;

FI;

FI;

FI;

Flags Affected

See the operation section and Section 30.2.

Protected Mode Exceptions

#GP(0)

If the current privilege level is not 0.
If the memory source operand effective address is outside the CS, DS, ES, FS, or GS segment 

limit.

If the DS, ES, FS, or GS register contains an unusable segment.

Opcode

Instruction

Description

0F C7 /6

VMPTRLD m64

Loads the current VMCS pointer from memory.

1. Software should consult the VMX capability MSR VMX_BASIC to discover the VMCS revision identifier supported by this processor 

(see Appendix A, “VMX Capability Reporting Facility”).

2. If IA32_VMX_BASIC[48] is read as 1, VMfail occurs if addr sets any bits in the range 63:32; see Appendix A.1.