A-6 Vol. 2D
OPCODE MAP
A.2.5
Superscripts Utilized in Opcode Tables
Table A-1 contains notes on particular encodings. These notes are indicated in the following opcode maps by super-
scripts. Gray cells indicate instruction groupings.
A.3
ONE, TWO, AND THREE-BYTE OPCODE MAPS
See Table A-2 through Table A-5 below. The tables are multiple page presentations. Rows and columns with
sequential relationships are placed on facing pages to make look-up tasks easier. Note that table footnotes are not
presented on each page. Table footnotes for each table are presented on the last page of the table.
Table A-1. Superscripts Utilized in Opcode Tables
Superscript
Symbol
Meaning of Symbol
1A
Bits 5, 4, and 3 of ModR/M byte used as an opcode extension (refer to Section A.4, “Opcode Extensions For One-Byte
1B
Use the 0F0B opcode (UD2 instruction) or the 0FB9H opcode when deliberately trying to generate an invalid opcode
exception (#UD).
1C
Some instructions use the same two-byte opcode. If the instruction has variations, or the opcode represents
different instructions, the ModR/M byte will be used to differentiate the instruction. For the value of the ModR/M
byte needed to decode the instruction, see Table A-6.
i64
The instruction is invalid or not encodable in 64-bit mode. 40 through 4F (single-byte INC and DEC) are REX prefix
combinations when in 64-bit mode (use FE/FF Grp 4 and 5 for INC and DEC).
o64
Instruction is only available when in 64-bit mode.
d64
When in 64-bit mode, instruction defaults to 64-bit operand size and cannot encode 32-bit operand size.
f64
The operand size is forced to a 64-bit operand size when in 64-bit mode (prefixes that change operand size are
ignored for this instruction in 64-bit mode).
v
VEX form only exists. There is no legacy SSE form of the instruction. For Integer GPR instructions it means VEX
prefix required.
v1
VEX128 & SSE forms only exist (no VEX256), when can’t be inferred from the data size.