12-2 Vol. 1
PROGRAMMING WITH INTEL® SSE3, SSSE3, INTEL® SSE4 AND INTEL® AESNI
12.2
OVERVIEW OF SSE3 INSTRUCTIONS
SSE3 extensions include 13 instructions. See:
•
Section 12.3, “SSE3 Instructions,” provides an introduction to individual SSE3 instructions.
•
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volumes 2A & 2B, provide detailed
information on individual instructions.
•
Chapter 13, “System Programming for Instruction Set Extensions and Processor Extended States,” in the
Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A, gives guidelines for integrating
SSE/SSE2/SSE3 extensions into an operating-system environment.
12.3 SSE3
INSTRUCTIONS
SSE3 instructions are grouped as follows:
•
x87 FPU instruction
— One instruction that improves x87 FPU floating-point to integer conversion
•
SIMD integer instruction
Figure 12-1. Asymmetric Processing in ADDSUBPD
Figure 12-2. Horizontal Data Movement in HADDPD
X1
X0
X1 + Y1
X0 -Y0
SUB
Y1
Y0
ADD
X1
X0
Y0 + Y1
X0 + X1
ADD
Y1
Y0
ADD