9-2 Vol. 1

PROGRAMMING WITH INTEL® MMX™ TECHNOLOGY

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General-purpose registers — The eight general-purpose registers (see Figure 3-5) are used with existing 
IA-32 addressing modes to address operands in memory. (MMX registers cannot be used to address memory). 
General-purpose registers are also used to hold operands for some MMX technology operations. They are EAX, 
EBX, ECX, EDX, EBP, ESI, EDI, and ESP.

9.2.1 

MMX Technology in 64-Bit Mode and Compatibility Mode

In compatibility mode and 64-bit mode, MMX instructions function like they do in protected mode. Memory oper-
ands are specified using the ModR/M, SIB encoding described in Section 3.7.5.

9.2.2 MMX 

Registers

The MMX register set consists of eight 64-bit registers (see Figure 9-2), that are used to perform calculations on 
the MMX packed integer data types. Values in MMX registers have the same format as a 64-bit quantity in memory. 
The MMX registers have two data access modes: 64-bit access mode and 32-bit access mode. The 64-bit access 
mode is used for:

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64-bit memory accesses

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64-bit transfers between MMX registers

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All pack, logical, and arithmetic instructions

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Some unpack instructions

The 32-bit access mode is used for:

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32-bit memory accesses

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32-bit transfer between general-purpose registers and MMX registers

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Some unpack instructions

Figure 9-1.  MMX Technology Execution Environment

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32

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Eight 32-Bit

Address Space

General-Purpose

Eight 64-Bit

MMX Registers

Registers