Vol. 1 7-7

PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS

7.3.1.5  

Stack Manipulation Instructions in 64-Bit Mode

In 64-bit mode, the stack pointer size is 64 bits and cannot be overridden by an instruction prefix. In implicit stack 
references, address-size overrides are ignored. Pushes and pops of 32-bit values on the stack are not possible in 
64-bit mode. 16-bit pushes and pops are supported by using the 66H operand-size prefix. PUSHA, PUSHAD, POPA, 
and POPAD are not supported.

7.3.1.6  

Type Conversion Instructions

The type conversion instructions convert bytes into words, words into doublewords, and doublewords into quad-
words. These instructions are especially useful for converting integers to larger integer formats, because they 
perform sign extension (see Figure 7-5).
Two kinds of type conversion instructions are provided: simple conversion and move and convert.

Simple conversion — The CBW (convert byte to word), CWDE (convert word to doubleword extended), CWD 
(convert word to doubleword), and CDQ (convert doubleword to quadword) instructions perform sign extension to 
double the size of the source operand.
The CBW instruction copies the sign (bit 7) of the byte in the AL register into every bit position of the upper byte of 
the AX register. The CWDE instruction copies the sign (bit 15) of the word in the AX register into every bit position 
of the high word of the EAX register.
The CWD instruction copies the sign (bit 15) of the word in the AX register into every bit position in the DX register. 
The CDQ instruction copies the sign (bit 31) of the doubleword in the EAX register into every bit position in the EDX 
register. The CWD instruction can be used to produce a doubleword dividend from a word before a word division, 
and the CDQ instruction can be used to produce a quadword dividend from a doubleword before doubleword divi-
sion.

Figure 7-4.  Operation of the POPA Instruction

Figure 7-5.  Sign Extension

Stack

After Popping Registers

Growth

ESP

n - 4
n - 8

n

Stack

Before Popping Registers

ESP

EAX

EDI

EBX

EBP

ECX
EDX

Ignored

ESI

n - 36

n - 20

n - 28

n - 12
n - 16

n - 24

n - 32

0

31

0

31

31

After Sign

15

0

S N N N N N N N N N

N

N

N N N N

S

S

S

S

S

S

S

S

S

S

S

S S

S

S

S

Extension

Before Sign

15

0

S N N N N N N N N N

N

N

N N N N

Extension