background image

19-192 Vol. 3B

PERFORMANCE-MONITORING EVENTS

Require Additional 

MSRs for tagging

An ESCR for an 

upstream event

See list of metrics supported by execution tagging in Table A-4.

replay_event 

This event counts the retirement of tagged μops, which are specified 

through the replay tagging mechanism. The event mask specifies 

bogus or non-bogus μops.

ESCR restrictions

MSR_CRU_ESCR2
MSR_CRU_ESCR3

Counter numbers 

per ESCR

ESCR2: 12, 13, 16
ESCR3: 14, 15, 17

ESCR Event Select

09H

ESCR[31:25]

ESCR Event Mask

Bit 
0: NBOGUS
1: BOGUS

ESCR[24:9]

The marked μops are not bogus.
The marked μops are bogus.

CCCR Select

05H

CCCR[15:13]

Event Specific 

Notes

Supports counting tagged μops with additional MSRs.

Can Support PEBS

Yes

Require Additional 

MSRs for tagging

IA32_PEBS_

ENABLE
MSR_PEBS_

MATRIX_VERT
Selected ESCR

See list of metrics supported by replay tagging in Table A-5.

instr_retired 

This event counts instructions that are retired during a clock cycle.
Mask bits specify bogus or non-bogus (and whether they are tagged 

using the front-end tagging mechanism).

ESCR restrictions

MSR_CRU_ESCR0
MSR_CRU_ESCR1

Counter numbers 

per ESCR

ESCR0: 12, 13, 16
ESCR1: 14, 15, 17

ESCR Event Select

02H

ESCR[31:25]

ESCR Event Mask

Bit 
0: NBOGUSNTAG

1: NBOGUSTAG

ESCR[24:9]

Non-bogus instructions that are not tagged.
Non-bogus instructions that are tagged. 

2: BOGUSNTAG

3: BOGUSTAG

Bogus instructions that are not tagged.
Bogus instructions that are tagged.

CCCR Select

04H

CCCR[15:13]

Event Specific 

Notes

1: The event count may vary depending on the microarchitectural 

states of the processor when the event detection is enabled. 

2: The event may count more than once for some instructions with 

complex uop flows and were interrupted before retirement.

Table 19-29.  Performance Monitoring Events For Intel NetBurst® Microarchitecture 

for At-Retirement Counting (Contd.)

Event Name

Event Parameters

 Parameter Value

Description