Vol. 3B 19-171

PERFORMANCE-MONITORING EVENTS

80H

ICache_Reads

00H

Number of instruction fetches from ICache, 

streaming buffers (both cacheable and uncacheable 

fetches).

81H

ICache_Misses

00H

Number of instruction fetch misses from ICache, 

streaming buffers.

85H

ITLB_Misses

00H

Number of iITLB misses.

86H

IFU_Mem_Stall

00H

Cycles IFU is stalled while waiting for data from 

memory.

87H

ILD_Stall

00H

Number of instruction length decoder stalls (Counts 

number of LCP stalls).

88H

Br_Inst_Exec

00H

Branch instruction executed (includes speculation).

89H

Br_Missp_Exec

00H

Branch instructions executed and mispredicted at 

execution (includes branches that do not have 

prediction or mispredicted).

8AH

Br_BAC_Missp_

Exec

00H

Branch instructions executed that were 

mispredicted at front end.

8BH

Br_Cnd_Exec

00H

Conditional branch instructions executed.

8CH

Br_Cnd_Missp_

Exec

00H

Conditional branch instructions executed that were 

mispredicted.

8DH

Br_Ind_Exec

00H

Indirect branch instructions executed.

8EH

Br_Ind_Missp_Exec

00H

Indirect branch instructions executed that were 

mispredicted.

8FH

Br_Ret_Exec

00H

Return branch instructions executed.

90H

Br_Ret_Missp_Exec

00H

Return branch instructions executed that were 

mispredicted.

91H

Br_Ret_BAC_Missp_

Exec

00H

Return branch instructions executed that were 

mispredicted at the front end.

92H

Br_Call_Exec

00H

Return call instructions executed.

93H

Br_Call_Missp_Exec

00H

Return call instructions executed that were 

mispredicted.

94H

Br_Ind_Call_Exec

00H

Indirect call branch instructions executed.

A2H

Resource_Stall

00H

Cycles while there is a resource related stall 

(renaming, buffer entries) as seen by allocator.

B0H

MMX_Instr_Exec

00H

Number of MMX instructions executed (does not 

include MOVQ and MOVD stores).

B1H

SIMD_Int_Sat_Exec

00H

Number of SIMD Integer saturating instructions 

executed.

B3H

SIMD_Int_Pmul_

Exec

01H

Number of SIMD Integer packed multiply 

instructions executed.

B3H

SIMD_Int_Psft_Exec 02H

Number of SIMD Integer packed shift instructions 

executed.

B3H

SIMD_Int_Pck_Exec

04H

Number of SIMD Integer pack operations instruction 

executed.

B3H

SIMD_Int_Upck_

Exec

08H

Number of SIMD Integer unpack instructions 

executed.

Table 19-27.  Non-Architectural Performance Events in Intel® Core™ Solo and Intel® Core™ Duo Processors (Contd.)

Event

Num.

Event Mask 

Mnemonic

Umask

Value

Description

Comment