19-140 Vol. 3B
PERFORMANCE-MONITORING EVENTS
D2H
02H
RAT_STALLS.
PARTIAL_CYCLES
Partial register stall
cycles.
This event counts the number of cycles instruction
execution latency became longer than the defined latency
because the instruction uses a register that was partially
written by previous instructions.
D2H
04H
RAT_STALLS.
FLAGS
Flag stall cycles.
This event counts the number of cycles during which
execution stalled due to several reasons, one of which is a
partial flag register stall.
A partial register stall may occur when two conditions are
met:
• An instruction modifies some, but not all, of the flags in
the flag register.
• The next instruction, which depends on flags, depends on
flags that were not modified by this instruction.
D2H
08H
RAT_STALLS.
FPSW
FPU status word stall. This event indicates that the FPU status word (FPSW) is
written. To obtain the number of times the FPSW is written
divide the event count by 2.
The FPSW is written by instructions with long latency; a
small count may indicate a high penalty.
D2H
0FH
RAT_STALLS.
ANY
All RAT stall cycles.
This event counts the number of stall cycles due to
conditions described by:
• RAT_STALLS.ROB_READ_PORT
• RAT_STALLS.PARTIAL
• RAT_STALLS.FLAGS
• RAT_STALLS.FPSW.
D4H
01H
SEG_RENAME_
STALLS.ES
Segment rename stalls
- ES.
This event counts the number of stalls due to the lack of
renaming resources for the ES segment register. If a
segment is renamed, but not retired and a second update to
the same segment occurs, a stall occurs in the front end of
the pipeline until the renamed segment retires.
D4H
02H
SEG_RENAME_
STALLS.DS
Segment rename stalls
- DS.
This event counts the number of stalls due to the lack of
renaming resources for the DS segment register. If a
segment is renamed, but not retired and a second update to
the same segment occurs, a stall occurs in the front end of
the pipeline until the renamed segment retires.
D4H
04H
SEG_RENAME_
STALLS.FS
Segment rename stalls
- FS.
This event counts the number of stalls due to the lack of
renaming resources for the FS segment register.
If a segment is renamed, but not retired and a second
update to the same segment occurs, a stall occurs in the
front end of the pipeline until the renamed segment retires.
D4H
08H
SEG_RENAME_
STALLS.GS
Segment rename stalls
- GS.
This event counts the number of stalls due to the lack of
renaming resources for the GS segment register.
If a segment is renamed, but not retired and a second
update to the same segment occurs, a stall occurs in the
front end of the pipeline until the renamed segment retires.
D4H
0FH
SEG_RENAME_
STALLS.ANY
Any (ES/DS/FS/GS)
segment rename stall.
This event counts the number of stalls due to the lack of
renaming resources for the ES, DS, FS, and GS segment
registers.
If a segment is renamed but not retired and a second update
to the same segment occurs, a stall occurs in the front end
of the pipeline until the renamed segment retires.
Table 19-23. Non-Architectural Performance Events in Processors Based on Intel® Core™ Microarchitecture (Contd.)
Event
Num
Umask
Value
Event Name
Definition
Description and
Comment