Vol. 3B 19-137
PERFORMANCE-MONITORING EVENTS
C7H
10H
SIMD_INST_
RETIRED.VECTOR
Retired SSE2 vector
integer instructions.
This event counts the number of SSE2 vector integer
instructions retired.
C7H
1FH
SIMD_INST_
RETIRED.ANY
Retired Streaming
SIMD instructions
(precise event).
This event counts the overall number of retired SIMD
instructions that use XMM registers. To count each type of
SIMD instruction separately, use the following events:
• SIMD_INST_RETIRED.PACKED_SINGLE
• SIMD_INST_RETIRED.SCALAR_SINGLE
• SIMD_INST_RETIRED.PACKED_DOUBLE
• SIMD_INST_RETIRED.SCALAR_DOUBLE
• and SIMD_INST_RETIRED.VECTOR
When this event is captured with the precise event
mechanism, the collected samples contain the address of
the instruction that was executed immediately after the
instruction that caused the event.
C8H
00H
HW_INT_RCV
Hardware interrupts
received.
This event counts the number of hardware interrupts
received by the processor.
C9H
00H
ITLB_MISS_
RETIRED
Retired instructions
that missed the ITLB.
This event counts the number of retired instructions that
missed the ITLB when they were fetched.
CAH
01H
SIMD_COMP_
INST_RETIRED.
PACKED_SINGLE
Retired computational
SSE packed-single
instructions.
This event counts the number of computational SSE packed-
single instructions retired. Computational instructions
perform arithmetic computations (for example: add, multiply
and divide).
Instructions that perform load and store operations or
logical operations, like XOR, OR, and AND are not counted by
this event.
CAH
02H
SIMD_COMP_
INST_RETIRED.
SCALAR_SINGLE
Retired computational
SSE scalar-single
instructions.
This event counts the number of computational SSE scalar-
single instructions retired. Computational instructions
perform arithmetic computations (for example: add, multiply
and divide).
Instructions that perform load and store operations or
logical operations, like XOR, OR, and AND are not counted by
this event.
CAH
04H
SIMD_COMP_
INST_RETIRED.
PACKED_DOUBLE
Retired computational
SSE2 packed-double
instructions.
This event counts the number of computational SSE2
packed-double instructions retired. Computational
instructions perform arithmetic computations (for example:
add, multiply and divide).
Instructions that perform load and store operations or
logical operations, like XOR, OR, and AND are not counted by
this event.
CAH
08H
SIMD_COMP_INST_RETIRE
D.SCALAR_DOUBLE
Retired computational
SSE2 scalar-double
instructions.
This event counts the number of computational SSE2 scalar-
double instructions retired. Computational instructions
perform arithmetic computations (for example: add, multiply
and divide).
Instructions that perform load and store operations or
logical operations, like XOR, OR, and AND are not counted by
this event.
Table 19-23. Non-Architectural Performance Events in Processors Based on Intel® Core™ Microarchitecture (Contd.)
Event
Num
Umask
Value
Event Name
Definition
Description and
Comment