Vol. 3B 19-87
PERFORMANCE-MONITORING EVENTS
0FH
01H
MEM_UNCORE_RETIRED.UNK
NOWN_SOURCE
Load instructions retired with unknown LLC miss
(Precise Event).
Applicable to one and
two sockets.
0FH
02H
MEM_UNCORE_RETIRED.OHTE
R_CORE_L2_HIT
Load instructions retired that HIT modified data in
sibling core (Precise Event).
Applicable to one and
two sockets.
0FH
04H
MEM_UNCORE_RETIRED.REMO
TE_HITM
Load instructions retired that HIT modified data in
remote socket (Precise Event).
Applicable to two
sockets only.
0FH
08H
MEM_UNCORE_RETIRED.LOCA
L_DRAM_AND_REMOTE_CACH
E_HIT
Load instructions retired local dram and remote
cache HIT data sources (Precise Event).
Applicable to one and
two sockets.
0FH
10H
MEM_UNCORE_RETIRED.REMO
TE_DRAM
Load instructions retired remote DRAM and remote
home-remote cache HITM (Precise Event).
Applicable to two
sockets only.
0FH
20H
MEM_UNCORE_RETIRED.OTHE
R_LLC_MISS
Load instructions retired other LLC miss (Precise
Event).
Applicable to two
sockets only.
0FH
80H
MEM_UNCORE_RETIRED.UNCA
CHEABLE
Load instructions retired I/O (Precise Event).
Applicable to one and
two sockets.
10H
01H
FP_COMP_OPS_EXE.X87
Counts the number of FP Computational Uops
Executed. The number of FADD, FSUB, FCOM,
FMULs, integer MULs and IMULs, FDIVs, FPREMs,
FSQRTS, integer DIVs, and IDIVs. This event does
not distinguish an FADD used in the middle of a
transcendental flow from a separate FADD
instruction.
10H
02H
FP_COMP_OPS_EXE.MMX
Counts number of MMX Uops executed.
10H
04H
FP_COMP_OPS_EXE.SSE_FP
Counts number of SSE and SSE2 FP uops executed.
10H
08H
FP_COMP_OPS_EXE.SSE2_INT
EGER
Counts number of SSE2 integer uops executed.
10H
10H
FP_COMP_OPS_EXE.SSE_FP_P
ACKED
Counts number of SSE FP packed uops executed.
10H
20H
FP_COMP_OPS_EXE.SSE_FP_S
CALAR
Counts number of SSE FP scalar uops executed.
10H
40H
FP_COMP_OPS_EXE.SSE_SING
LE_PRECISION
Counts number of SSE* FP single precision uops
executed.
10H
80H
FP_COMP_OPS_EXE.SSE_DOU
BLE_PRECISION
Counts number of SSE* FP double precision uops
executed.
12H
01H
SIMD_INT_128.PACKED_MPY
Counts number of 128 bit SIMD integer multiply
operations.
12H
02H
SIMD_INT_128.PACKED_SHIFT Counts number of 128 bit SIMD integer shift
operations.
12H
04H
SIMD_INT_128.PACK
Counts number of 128 bit SIMD integer pack
operations.
12H
08H
SIMD_INT_128.UNPACK
Counts number of 128 bit SIMD integer unpack
operations.
12H
10H
SIMD_INT_128.PACKED_LOGIC
AL
Counts number of 128 bit SIMD integer logical
operations.
12H
20H
SIMD_INT_128.PACKED_ARIT
H
Counts number of 128 bit SIMD integer arithmetic
operations.
Table 19-19. Non-Architectural Performance Events In the Processor Core for
Processors Based on IntelĀ® Microarchitecture Code Name Westmere (Contd.)
Event
Num.
Umask
Value
Event Mask Mnemonic
Description
Comment