Vol. 3B 19-73
PERFORMANCE-MONITORING EVENTS
Non-architectural performance monitoring events that are located in the uncore sub-system are implementation
specific between different platforms using processors based on Intel microarchitecture code name Nehalem.
Processors with CPUID signature of DisplayFamily_DisplayModel 06_1AH, 06_1EH, and 06_1FH support perfor-
mance events listed in Table 19-18.
F2H
02H
L2_LINES_OUT.DEMAND_DIRT
Y
Counts L2 dirty (modified) cache lines evicted by a
demand request.
F2H
04H
L2_LINES_OUT.PREFETCH_CLE
AN
Counts L2 clean cache line evicted by a prefetch
request.
F2H
08H
L2_LINES_OUT.PREFETCH_DIR
TY
Counts L2 modified cache line evicted by a prefetch
request.
F2H
0FH
L2_LINES_OUT.ANY
Counts all L2 cache lines evicted for any reason.
F4H
10H
SQ_MISC.SPLIT_LOCK
Counts the number of SQ lock splits across a cache
line.
F6H
01H
SQ_FULL_STALL_CYCLES
Counts cycles the Super Queue is full. Neither of the
threads on this core will be able to access the
uncore.
F7H
01H
FP_ASSIST.ALL
Counts the number of floating point operations
executed that required micro-code assist
intervention. Assists are required in the following
cases: SSE instructions (denormal input when the
DAZ flag is off or underflow result when the FTZ
flag is off); x87 instructions (NaN or denormal are
loaded to a register or used as input from memory,
division by 0 or underflow output).
F7H
02H
FP_ASSIST.OUTPUT
Counts number of floating point micro-code assist
when the output value (destination register) is
invalid.
F7H
04H
FP_ASSIST.INPUT
Counts number of floating point micro-code assist
when the input value (one of the source operands
to an FP instruction) is invalid.
FDH
01H
SIMD_INT_64.PACKED_MPY
Counts number of SID integer 64 bit packed multiply
operations.
FDH
02H
SIMD_INT_64.PACKED_SHIFT
Counts number of SID integer 64 bit packed shift
operations.
FDH
04H
SIMD_INT_64.PACK
Counts number of SID integer 64 bit pack
operations.
FDH
08H
SIMD_INT_64.UNPACK
Counts number of SID integer 64 bit unpack
operations.
FDH
10H
SIMD_INT_64.PACKED_LOGICA
L
Counts number of SID integer 64 bit logical
operations.
FDH
20H
SIMD_INT_64.PACKED_ARITH
Counts number of SID integer 64 bit arithmetic
operations.
FDH
40H
SIMD_INT_64.SHUFFLE_MOVE Counts number of SID integer 64 bit shift or move
operations.
Table 19-17. Non-Architectural Performance Events In the Processor Core for
Intel® Core™ i7 Processor and Intel® Xeon® Processor 5500 Series (Contd.)
Event
Num.
Umask
Value
Event Mask Mnemonic
Description
Comment