Vol. 3B 17-43

DEBUG, BRANCH PROFILE, TSC, AND RESOURCE MONITORING FEATURES

•

A mechanism to enumerate the presence of the monitoring capabilities within the platform (via a CPUID feature 
bit).

•

A framework to enumerate the details of each sub-feature (including CMT and MBM, as discussed later, via 
CPUID leaves and sub-leaves). 

•

A mechanism for the OS or Hypervisor to indicate a software-defined ID for each of the software threads (appli-
cations, virtual machines, etc.) that are scheduled to run on a logical processor. These identifiers are known as 
Resource Monitoring IDs (RMIDs). 

•

Mechanisms in hardware to monitor cache occupancy and bandwidth statistics as applicable to a given product 
generation on a per software-id basis. 

•

Mechanisms for the OS or Hypervisor to read back the collected metrics such as L3 occupancy or Memory 
Bandwidth for a given software ID at any point during runtime.

17.16.1  Overview of Cache Monitoring Technology and Memory Bandwidth Monitoring

The shared resource monitoring features described in this chapter provide a layer of abstraction between applica-
tions and logical processors through the use of Resource Monitoring IDs (RMIDs). Each logical processor in the 
system can be assigned an RMID independently, or multiple logical processors can be assigned to the same RMID 
value (e.g., to track an application with multiple threads). For each logical processor, only one RMID value is active 
at a time. This is enforced by the IA32_PQR_ASSOC MSR, which specifies the active RMID of a logical processor. 
Writing to this MSR by software changes the active RMID of the logical processor from an old value to a new value.
The underlying platform shared resource monitoring hardware tracks cache metrics such as cache utilization and 
misses as a result of memory accesses according to the RMIDs and reports monitored data via a counter register 
(

IA32_QM_CTR). The specific event types supported vary by generation and can be enumerated via CPUID. Before 

reading back monitored data software must configure an event selection MSR (IA32_QM_EVTSEL) to specify which 
metric is to be reported, and the specific RMID for which the data should be returned. 
Processor support of the monitoring framework and sub-features such as CMT is reported via the CPUID instruc-
tion. The resource type available to the monitoring framework is enumerated via a new leaf function in CPUID. 
Reading and writing to the monitoring MSRs requires the RDMSR and WRMSR instructions.
The Cache Monitoring Technology feature set provides the following unique mechanisms:

•

A mechanism to enumerate the presence and details of the CMT feature as applicable to a given level of the 
cache hierarchy, independent of other monitoring features. 

•

CMT-specific event codes to read occupancy for a given level of the cache hierarchy.

The Memory Bandwidth Monitoring feature provides the following unique mechanisms:

•

A mechanism to enumerate the presence and details of the MBM feature as applicable to a given level of the 
cache hierarchy, independent of other monitoring features.

•

MBM-specific event codes to read bandwidth out to the next level of the hierarchy and various sub-event codes 
to read more specific metrics as discussed later (e.g., total bandwidth vs. bandwidth only from local memory 
controllers on the same package).

17.16.2  Enabling Monitoring: Usage Flow

Figure 17-19 illustrates the key steps for OS/VMM to detect support of shared resource monitoring features such 
as CMT and enable resource monitoring for available resource types and monitoring events.