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Vol. 3A 1-9

ABOUT THIS MANUAL

1.3.7 Exceptions

An exception is an event that typically occurs when an instruction causes an error. For example, an attempt to 
divide by zero generates an exception. However, some exceptions, such as breakpoints, occur under other condi-
tions. Some types of exceptions may provide error codes. An error code reports additional information about the 
error. An example of the notation used to show an exception and error code is shown below:

#PF(fault code)

This example refers to a page-fault exception under conditions where an error code naming a type of fault is 
reported. Under some conditions, exceptions which produce error codes may not be able to report an accurate 
code. In this case, the error code is zero, as shown below for a general-protection exception:

#GP(0)

1.4 RELATED 

LITERATURE

Literature related to Intel 64 and IA-32 processors is listed and viewable on-line at: 

http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html

See also: 

The data sheet for a particular Intel 64 or IA-32 processor

The specification update for a particular Intel 64 or IA-32 processor

Intel

®

 C++ Compiler documentation and online help:

http://software.intel.com/en-us/articles/intel-compilers/

Intel

®

 Fortran Compiler documentation and online help:

http://software.intel.com/en-us/articles/intel-compilers/

Intel

®

 Software Development Tools:

http://www.intel.com/cd/software/products/asmo-na/eng/index.htm 

Intel

®

 64 and IA-32 Architectures Software Developer’s Manual (in three or seven volumes):

http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html

Intel

®

 64 and IA-32 Architectures Optimization Reference Manual: 

http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-
manual.html

Intel 64 Architecture x2APIC Specification:

http://www.intel.com/content/www/us/en/architecture-and-technology/64-architecture-x2apic-specifi-
cation.html

Intel

®

 Trusted Execution Technology Measured Launched Environment Programming Guide:

http://www.intel.com/content/www/us/en/software-developers/intel-txt-software-development-guide.html

Developing Multi-threaded Applications: A Platform Consistent Approach:

https://software.intel.com/sites/default/files/article/147714/51534-developing-multithreaded-applica-
tions.pdf

Using Spin-Loops on Intel

®

 Pentium

®

 4 Processor and Intel

®

 Xeon

®

 Processor:

http://software.intel.com/en-us/articles/ap949-using-spin-loops-on-intel-pentiumr-4-processor-and-intel-
xeonr-processor/

Performance Monitoring Unit Sharing Guide

http://software.intel.com/file/30388

Literature related to selected features in future Intel processors are available at:

Intel

®

 Architecture Instruction Set Extensions Programming Reference

https://software.intel.com/en-us/isa-extensions

Intel

®

 Software Guard Extensions (Intel

®

 SGX) Programming Reference

https://software.intel.com/en-us/isa-extensions/intel-sgx